Yield-Aware Analog IC Design and Optimization in Nanometer-scale Technologies PDF Download

Author: António Manuel Lourenço Canelas
Publisher: Springer Nature
ISBN: 3030415368
Category : Technology & Engineering
Languages : en
Pages : 254

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Book Description
This book presents a new methodology with reduced time impact to address the problem of analog integrated circuit (IC) yield estimation by means of Monte Carlo (MC) analysis, inside an optimization loop of a population-based algorithm. The low time impact on the overall optimization processes enables IC designers to perform yield optimization with the most accurate yield estimation method, MC simulations using foundry statistical device models considering local and global variations. The methodology described by the authors delivers on average a reduction of 89% in the total number of MC simulations, when compared to the exhaustive MC analysis over the full population. In addition to describing a newly developed yield estimation technique, the authors also provide detailed background on automatic analog IC sizing and optimization.

Author: Soumya Pandit
Publisher: CRC Press
ISBN: 1351831992
Category : Technology & Engineering
Languages : en
Pages : 410

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Book Description
Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology, and adequate use of the knowledge database. Starting with the basics, Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design introduces the essential fundamental concepts for designing analog circuits with optimal performances. This book explains the links between the physics and technology of scaled MOS transistors and the design and simulation of nano-scale analog circuits. It also explores the development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits. The book outlines the general trends of technology scaling with respect to device geometry, process parameters, and supply voltage. It describes models and optimization techniques, as well as the compact modeling of scaled MOS transistors for VLSI circuit simulation. • Includes two learning-based methods: the artificial neural network (ANN) and the least-squares support vector machine (LS-SVM) method • Provides case studies demonstrating the practical use of these two methods • Explores circuit sizing and specification translation tasks • Introduces the particle swarm optimization technique and provides examples of sizing analog circuits • Discusses the advanced effects of scaled MOS transistors like narrow width effects, and vertical and lateral channel engineering Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design describes the models and CAD techniques, explores the physics of MOS transistors, and considers the design challenges involving statistical variations of process technology parameters and reliability constraints related to circuit design.

Author: Nuno Lourenço
Publisher: Springer
ISBN: 3319420372
Category : Technology & Engineering
Languages : en
Pages : 199

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Book Description
This book introduces readers to a variety of tools for automatic analog integrated circuit (IC) sizing and optimization. The authors provide a historical perspective on the early methods proposed to tackle automatic analog circuit sizing, with emphasis on the methodologies to size and optimize the circuit, and on the methodologies to estimate the circuit’s performance. The discussion also includes robust circuit design and optimization and the most recent advances in layout-aware analog sizing approaches. The authors describe a methodology for an automatic flow for analog IC design, including details of the inputs and interfaces, multi-objective optimization techniques, and the enhancements made in the base implementation by using machine leaning techniques. The Gradient model is discussed in detail, along with the methods to include layout effects in the circuit sizing. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. An extensive set of application examples is included to demonstrate the capabilities and features of the methodologies described.

Author: Nadine Azemard
Publisher: Springer Science & Business Media
ISBN: 354074441X
Category : Computers
Languages : en
Pages : 595

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Book Description
This volume features the refereed proceedings of the 17th International Workshop on Power and Timing Modeling, Optimization and Simulation. Papers cover high level design, low power design techniques, low power analog circuits, statistical static timing analysis, power modeling and optimization, low power routing optimization, security and asynchronous design, low power applications, modeling and optimization, and more.

Author: Faruk Y?lmaz, Ömer
Publisher: IGI Global
ISBN: 1522529454
Category : Business & Economics
Languages : en
Pages : 449

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Book Description
Today’s manufacturing systems are undergoing significant changes in the aspects of planning, production execution, and delivery. It is imperative to stay up-to-date on the latest trends in optimization to efficiently create products for the market. The Handbook of Research on Applied Optimization Methodologies in Manufacturing Systems is a pivotal reference source including the latest scholarly research on heuristic models for solving manufacturing and supply chain related problems. Featuring exhaustive coverage on a broad range of topics such as assembly ratio, car sequencing, and color constraints, this publication is ideally designed for practitioners seeking new comprehensive models for problem solving in manufacturing and supply chain management.

Author: Guo Yu
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Book Description
As CMOS technologies move to sub-100nm regions, the design and verification for analog/mixed-signal circuits become more and more difficult due to the problems including the decrease of transconductance, severe gate leakage and profound mismatches. The increasing manufacturing-induced process variations and their impacts on circuit performances make the already complex circuit design even more sophisticated in the deeply scaled CMOS technologies. Given these barriers, efforts are needed to ensure the circuits are robust and optimized with consideration of parametric variations. This research presents innovative computer-aided design approaches to address three such problems: (1) large analog/mixed-signal performance modeling under process variations, (2) yield-aware optimization for complex analog/mixedsignal systems and (3) on-chip test scheme development to detect and compensate parametric failures. The first problem focus on the efficient circuit performance evaluation with consideration of process variations which serves as the baseline for robust analog circuit design. We propose statistical performance modeling methods for two popular types of complex analog/mixed-signal circuits including Sigma-Delta ADCs and charge-pump PLLs. A more general performance modeling is achieved by employing a geostatistics motivated performance model (Kriging model), which is accurate and efficient for capturing stand-alone analog circuit block performances. Based on the generated block-level performance models, we can solve the more challenging problem of yield-aware system optimization for large analog/mixed-signal systems. Multi-yield pareto fronts are utilized in the hierarchical optimization framework so that the statistical optimal solutions can be achieved efficiently for the systems. We further look into on-chip design-for-test (DFT) circuits in analog systems and solve the problems of linearity test in ADCs and DFT scheme optimization in charge-pump PLLs. Finally a design example of digital intensive PLL is presented to illustrate the practical applications of the modeling, optimization and testing approaches for large analog/mixed-signal systems.

Author: Soumya Pandit
Publisher: CRC Press
ISBN: 1466564288
Category : Technology & Engineering
Languages : en
Pages : 397

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Book Description
Reliability concerns and the limitations of process technology can sometimes restrict the innovation process involved in designing nano-scale analog circuits. The success of nano-scale analog circuit design requires repeat experimentation, correct analysis of the device physics, process technology, and adequate use of the knowledge database. Starting with the basics, Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design introduces the essential fundamental concepts for designing analog circuits with optimal performances. This book explains the links between the physics and technology of scaled MOS transistors and the design and simulation of nano-scale analog circuits. It also explores the development of structured computer-aided design (CAD) techniques for architecture-level and circuit-level design of analog circuits. The book outlines the general trends of technology scaling with respect to device geometry, process parameters, and supply voltage. It describes models and optimization techniques, as well as the compact modeling of scaled MOS transistors for VLSI circuit simulation. • Includes two learning-based methods: the artificial neural network (ANN) and the least-squares support vector machine (LS-SVM) method • Provides case studies demonstrating the practical use of these two methods • Explores circuit sizing and specification translation tasks • Introduces the particle swarm optimization technique and provides examples of sizing analog circuits • Discusses the advanced effects of scaled MOS transistors like narrow width effects, and vertical and lateral channel engineering Nano-Scale CMOS Analog Circuits: Models and CAD Techniques for High-Level Design describes the models and CAD techniques, explores the physics of MOS transistors, and considers the design challenges involving statistical variations of process technology parameters and reliability constraints related to circuit design.

Author: Trent McConaghy
Publisher: Springer Science & Business Media
ISBN: 1461422698
Category : Technology & Engineering
Languages : en
Pages : 198

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Book Description
This book targets custom IC designers who are encountering variation issues in their designs, especially for modern process nodes at 45nm and below, such as statistical process variations, environmental variations, and layout effects. It teaches them the state-of-the-art in Variation-Aware Design tools, which help the designer to analyze quickly the variation effects, identify the problems, and fix the problems. Furthermore, this book describes the algorithms and algorithm behavior/performance/limitations, which is of use to designers considering these tools, designers using these tools, CAD researchers, and CAD managers.

Author: Xuan Dong
Publisher:
ISBN:
Category :
Languages : en
Pages :

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Book Description
As transistor sizes shrink over time in the advanced nanometer technologies, lithography effects have become a dominant contributor of integrated circuit (IC) yield degradation. Random manufacturing variations, such as photolithographic defect or spot defect, may cause fatal functional failures, while systematic process variations, such as dose fluctuation and defocus, can result in wafer pattern distortions and in turn ruin circuit performance. This dissertation is focused on yield optimization at the circuit design stage or so-called design for manufacturability (DFM) with respect to analog ICs, which has not yet been sufficiently addressed by traditional DFM solutions. On top of a graph-based analog layout retargeting framework, in this dissertation the photolithographic defects and lithography process variations are alleviated by geometrical layout manipulation operations including wire widening, wire shifting, process variation band (PV-band) shifting, and optical proximity correction (OPC). The ultimate objective of this research is to develop efficient algorithms and methodologies in order to achieve lithography-robust analog IC layout design without circuit performance degradation.

Author: Bruce W. Smith
Publisher: CRC Press
ISBN: 1439876762
Category : Technology & Engineering
Languages : en
Pages : 838

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Book Description
The completely revised Third Edition to the bestselling Microlithography: Science and Technology provides a balanced treatment of theoretical and operational considerations, from fundamental principles to advanced topics of nanoscale lithography. The book is divided into chapters covering all important aspects related to the imaging, materials, and processes that have been necessary to drive semiconductor lithography toward nanometer-scale generations. Renowned experts from the world’s leading academic and industrial organizations have provided in-depth coverage of the technologies involved in optical, deep-ultraviolet (DUV), immersion, multiple patterning, extreme ultraviolet (EUV), maskless, nanoimprint, and directed self-assembly lithography, together with comprehensive descriptions of the advanced materials and processes involved. New in the Third Edition In addition to the full revision of existing chapters, this new Third Edition features coverage of the technologies that have emerged over the past several years, including multiple patterning lithography, design for manufacturing, design process technology co-optimization, maskless lithography, and directed self-assembly. New advances in lithography modeling are covered as well as fully updated information detailing the new technologies, systems, materials, and processes for optical UV, DUV, immersion, and EUV lithography. The Third Edition of Microlithography: Science and Technology authoritatively covers the science and engineering involved in the latest generations of microlithography and looks ahead to the future systems and technologies that will bring the next generations to fruition. Loaded with illustrations, equations, tables, and time-saving references to the most current technology, this book is the most comprehensive and reliable source for anyone, from student to seasoned professional, looking to better understand the complex world of microlithography science and technology.