2006 IEEE International Test Conference : Santa Clara, CA : 22-27 October 2006 PDF Download

Author: International Test Conference
Publisher:
ISBN:
Category : Electronic digital computers
Languages : en
Pages :

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Author: Mohammad Tehranipoor
Publisher: Springer Science & Business Media
ISBN: 1441982973
Category : Technology & Engineering
Languages : en
Pages : 228

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Book Description
This book will introduce new techniques for detecting and diagnosing small-delay defects in integrated circuits. Although this sort of timing defect is commonly found in integrated circuits manufactured with nanometer technology, this will be the first book to introduce effective and scalable methodologies for screening and diagnosing small-delay defects, including important parameters such as process variations, crosstalk, and power supply noise.

Author: Manjul Bhushan
Publisher: Springer Science & Business Media
ISBN: 1441993770
Category : Technology & Engineering
Languages : en
Pages : 401

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Book Description
Microelectronic Test Structures for CMOS Technology and Products addresses the basic concepts of the design of test structures for incorporation within test-vehicles, scribe-lines, and CMOS products. The role of test structures in the development and monitoring of CMOS technologies and products has become ever more important with the increased cost and complexity of development and manufacturing. In this timely volume, IBM scientists Manjul Bhushan and Mark Ketchen emphasize high speed characterization techniques for digital CMOS circuit applications and bridging between circuit performance and characteristics of MOSFETs and other circuit elements. Detailed examples are presented throughout, many of which are equally applicable to other microelectronic technologies as well. The authors’ overarching goal is to provide students and technology practitioners alike a practical guide to the disciplined design and use of test structures that give unambiguous information on the parametrics and performance of digital CMOS technology.

Author: Swarup Bhunia
Publisher: Morgan Kaufmann
ISBN: 0128124784
Category : Computers
Languages : en
Pages : 528

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Book Description
Hardware Security: A Hands-On Learning Approach provides a broad, comprehensive and practical overview of hardware security that encompasses all levels of the electronic hardware infrastructure. It covers basic concepts like advanced attack techniques and countermeasures that are illustrated through theory, case studies and well-designed, hands-on laboratory exercises for each key concept. The book is ideal as a textbook for upper-level undergraduate students studying computer engineering, computer science, electrical engineering, and biomedical engineering, but is also a handy reference for graduate students, researchers and industry professionals. For academic courses, the book contains a robust suite of teaching ancillaries. Users will be able to access schematic, layout and design files for a printed circuit board for hardware hacking (i.e. the HaHa board) that can be used by instructors to fabricate boards, a suite of videos that demonstrate different hardware vulnerabilities, hardware attacks and countermeasures, and a detailed description and user manual for companion materials. - Provides a thorough overview of computer hardware, including the fundamentals of computer systems and the implications of security risks - Includes discussion of the liability, safety and privacy implications of hardware and software security and interaction - Gives insights on a wide range of security, trust issues and emerging attacks and protection mechanisms in the electronic hardware lifecycle, from design, fabrication, test, and distribution, straight through to supply chain and deployment in the field - A full range of instructor and student support materials can be found on the authors' own website for the book: http://hwsecuritybook.org

Author: International Test Conference
Publisher:
ISBN:
Category :
Languages : en
Pages : 666

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Author: Mohamed Abu Rahma
Publisher: Springer Science & Business Media
ISBN: 146141749X
Category : Technology & Engineering
Languages : en
Pages : 176

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Book Description
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density. With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power. This book is an invaluable reference on robust SRAM circuits and statistical design methodologies for researchers and practicing engineers in the field of memory design. It combines state of the art circuit techniques and statistical methodologies to optimize SRAM performance and yield in nanometer technologies. Provides comprehensive review of state-of-the-art, variation-tolerant SRAM circuit techniques; Discusses Impact of device related process variations and how they affect circuit and system performance, from a design point of view; Helps designers optimize memory yield, with practical statistical design methodologies and yield estimation techniques.

Author: Hans-Joachim Wunderlich
Publisher: Springer Science & Business Media
ISBN: 9048132827
Category : Computers
Languages : en
Pages : 263

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Book Description
Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.

Author: Alexandru-Petru Tanase
Publisher: Springer
ISBN: 3319739093
Category : Technology & Engineering
Languages : en
Pages : 184

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This book introduces new compilation techniques, using the polyhedron model for the resource-adaptive parallel execution of loop programs on massively parallel processor arrays. The authors show how to compute optimal symbolic assignments and parallel schedules of loop iterations at compile time, for cases where the number of available cores becomes known only at runtime. The compile/runtime symbolic parallelization approach the authors describe reduces significantly the runtime overhead, compared to dynamic or just‐in-time compilation. The new, on‐demand fault‐tolerant loop processing approach described in this book protects loop nests for parallel execution against soft errors.

Author:
Publisher:
ISBN: 9781424402915
Category :
Languages : en
Pages :

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Author: Fernanda Kastensmidt
Publisher: Springer
ISBN: 3319143522
Category : Technology & Engineering
Languages : en
Pages : 319

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Book Description
This book introduces the concepts of soft errors in FPGAs, as well as the motivation for using commercial, off-the-shelf (COTS) FPGAs in mission-critical and remote applications, such as aerospace. The authors describe the effects of radiation in FPGAs, present a large set of soft-error mitigation techniques that can be applied in these circuits, as well as methods for qualifying these circuits under radiation. Coverage includes radiation effects in FPGAs, fault-tolerant techniques for FPGAs, use of COTS FPGAs in aerospace applications, experimental data of FPGAs under radiation, FPGA embedded processors under radiation and fault injection in FPGAs. Since dedicated parallel processing architectures such as GPUs have become more desirable in aerospace applications due to high computational power, GPU analysis under radiation is also discussed.