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Author: Jeroen A. Croon Publisher: Springer Science & Business Media ISBN: 0387243135 Category : Technology & Engineering Languages : en Pages : 214
Book Description
Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction: A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter. The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters. The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance. The impact of process parameters on the matching properties is discussed. The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor. Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the stochastic properties of the MOSFET.
Author: Jeroen A. Croon Publisher: Springer Science & Business Media ISBN: 0387243135 Category : Technology & Engineering Languages : en Pages : 214
Book Description
Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction: A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter. The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters. The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance. The impact of process parameters on the matching properties is discussed. The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor. Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the stochastic properties of the MOSFET.
Author: Jeroen A. Croon Publisher: Springer ISBN: 9780387504803 Category : Technology & Engineering Languages : en Pages : 0
Book Description
Matching Properties of Deep Sub-Micron MOS Transistors examines this interesting phenomenon. Microscopic fluctuations cause stochastic parameter fluctuations that affect the accuracy of the MOSFET. For analog circuits this determines the trade-off between speed, power, accuracy and yield. Furthermore, due to the down-scaling of device dimensions, transistor mismatch has an increasing impact on digital circuits. The matching properties of MOSFETs are studied at several levels of abstraction: A simple and physics-based model is presented that accurately describes the mismatch in the drain current. The model is illustrated by dimensioning the unit current cell of a current-steering D/A converter. The most commonly used methods to extract the matching properties of a technology are bench-marked with respect to model accuracy, measurement accuracy and speed, and physical contents of the extracted parameters. The physical origins of microscopic fluctuations and how they affect MOSFET operation are investigated. This leads to a refinement of the generally applied 1/area law. In addition, the analysis of simple transistor models highlights the physical mechanisms that dominate the fluctuations in the drain current and transconductance. The impact of process parameters on the matching properties is discussed. The impact of gate line-edge roughness is investigated, which is considered to be one of the roadblocks to the further down-scaling of the MOS transistor. Matching Properties of Deep Sub-Micron MOS Transistors is aimed at device physicists, characterization engineers, technology designers, circuit designers, or anybody else interested in the stochastic properties of the MOSFET.
Author: Christian C. Enz Publisher: John Wiley & Sons ISBN: 0470855452 Category : Technology & Engineering Languages : en Pages : 328
Book Description
Modern, large-scale analog integrated circuits (ICs) are essentially composed of metal-oxide semiconductor (MOS) transistors and their interconnections. As technology scales down to deep sub-micron dimensions and supply voltage decreases to reduce power consumption, these complex analog circuits are even more dependent on the exact behavior of each transistor. High-performance analog circuit design requires a very detailed model of the transistor, describing accurately its static and dynamic behaviors, its noise and matching limitations and its temperature variations. The charge-based EKV (Enz-Krummenacher-Vittoz) MOS transistor model for IC design has been developed to provide a clear understanding of the device properties, without the use of complicated equations. All the static, dynamic, noise, non-quasi-static models are completely described in terms of the inversion charge at the source and at the drain taking advantage of the symmetry of the device. Thanks to its hierarchical structure, the model offers several coherent description levels, from basic hand calculation equations to complete computer simulation model. It is also compact, with a minimum number of process-dependant device parameters. Written by its developers, this book provides a comprehensive treatment of the EKV charge-based model of the MOS transistor for the design and simulation of low-power analog and RF ICs. Clearly split into three parts, the authors systematically examine: the basic long-channel intrinsic charge-based model, including all the fundamental aspects of the EKV MOST model such as the basic large-signal static model, the noise model, and a discussion of temperature effects and matching properties; the extended charge-based model, presenting important information for understanding the operation of deep-submicron devices; the high-frequency model, setting out a complete MOS transistor model required for designing RF CMOS integrated circuits. Practising engineers and circuit designers in the semiconductor device and electronics systems industry will find this book a valuable guide to the modelling of MOS transistors for integrated circuits. It is also a useful reference for advanced students in electrical and computer engineering.
Author: Arthur H.M. van Roermund Publisher: Springer Science & Business Media ISBN: 1461445876 Category : Technology & Engineering Languages : en Pages : 291
Book Description
This book is based on the 18 presentations during the 21st workshop on Advances in Analog Circuit Design. Expert designers provide readers with information about a variety of topics at the frontier of analog circuit design, including Nyquist analog-to-digital converters, capacitive sensor interfaces, reliability, variability, and connectivity. This book serves as a valuable reference to the state-of-the-art, for anyone involved in analog circuit research and development.
Author: Samar K. Saha Publisher: CRC Press ISBN: 148224067X Category : Technology & Engineering Languages : en Pages : 548
Book Description
Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond provides a modern treatise on compact models for circuit computer-aided design (CAD). Written by an author with more than 25 years of industry experience in semiconductor processes, devices, and circuit CAD, and more than 10 years of academic experience in teaching compact modeling courses, this first-of-its-kind book on compact SPICE models for very-large-scale-integrated (VLSI) chip design offers a balanced presentation of compact modeling crucial for addressing current modeling challenges and understanding new models for emerging devices. Starting from basic semiconductor physics and covering state-of-the-art device regimes from conventional micron to nanometer, this text: Presents industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor (MOS) field-effect-transistors (FETs), FinFETs, and tunnel field-effect transistors (TFETs), along with statistical MOS models Discusses the major issue of process variability, which severely impacts device and circuit performance in advanced technologies and requires statistical compact models Promotes further research of the evolution and development of compact models for VLSI circuit design and analysis Supplies fundamental and practical knowledge necessary for efficient integrated circuit (IC) design using nanoscale devices Includes exercise problems at the end of each chapter and extensive references at the end of the book Compact Models for Integrated Circuit Design: Conventional Transistors and Beyond is intended for senior undergraduate and graduate courses in electrical and electronics engineering as well as for researchers and practitioners working in the area of electron devices. However, even those unfamiliar with semiconductor physics gain a solid grasp of compact modeling concepts from this book.
Author: Gennady Gildenblat Publisher: Springer Science & Business Media ISBN: 9048186145 Category : Technology & Engineering Languages : en Pages : 531
Book Description
Most of the recent texts on compact modeling are limited to a particular class of semiconductor devices and do not provide comprehensive coverage of the field. Having a single comprehensive reference for the compact models of most commonly used semiconductor devices (both active and passive) represents a significant advantage for the reader. Indeed, several kinds of semiconductor devices are routinely encountered in a single IC design or in a single modeling support group. Compact Modeling includes mostly the material that after several years of IC design applications has been found both theoretically sound and practically significant. Assigning the individual chapters to the groups responsible for the definitive work on the subject assures the highest possible degree of expertise on each of the covered models.
Author: Wai Shing Lau Publisher: World Scientific ISBN: 9813222174 Category : Technology & Engineering Languages : en Pages : 247
Book Description
The main focus of this book is ULSI front-end technology. It covers from the early history of semiconductor science & technology from 1874 to state-of-the-art FINFET technology in 2016. Some ULSI back-end technology is also covered, for example, the science and technology of MIM capacitors for analog CMOS has been included in this book.
Author: Mohamed Abu Rahma Publisher: Springer Science & Business Media ISBN: 146141749X Category : Technology & Engineering Languages : en Pages : 176
Book Description
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nanometer technologies, SRAM show an increased sensitivity to process variations due to low-voltage operation requirements, which are aggravated by the strong demand for lower power consumption and cost, while achieving higher performance and density. With the drastic increase in memory densities, lower supply voltages, and higher variations, statistical simulation methodologies become imperative to estimate memory yield and optimize performance and power. This book is an invaluable reference on robust SRAM circuits and statistical design methodologies for researchers and practicing engineers in the field of memory design. It combines state of the art circuit techniques and statistical methodologies to optimize SRAM performance and yield in nanometer technologies. Provides comprehensive review of state-of-the-art, variation-tolerant SRAM circuit techniques; Discusses Impact of device related process variations and how they affect circuit and system performance, from a design point of view; Helps designers optimize memory yield, with practical statistical design methodologies and yield estimation techniques.
Author: Amir Zjajo Publisher: Springer Science & Business Media ISBN: 9400777817 Category : Technology & Engineering Languages : en Pages : 207
Book Description
One of the most notable features of nanometer scale CMOS technology is the increasing magnitude of variability of the key device parameters affecting performance of integrated circuits. The growth of variability can be attributed to multiple factors, including the difficulty of manufacturing control, the emergence of new systematic variation-generating mechanisms, and most importantly, the increase in atomic-scale randomness, where device operation must be described as a stochastic process. In addition to wide-sense stationary stochastic device variability and temperature variation, existence of non-stationary stochastic electrical noise associated with fundamental processes in integrated-circuit devices represents an elementary limit on the performance of electronic circuits. In an attempt to address these issues, Stochastic Process Variation in Deep-Submicron CMOS: Circuits and Algorithms offers unique combination of mathematical treatment of random process variation, electrical noise and temperature and necessary circuit realizations for on-chip monitoring and performance calibration. The associated problems are addressed at various abstraction levels, i.e. circuit level, architecture level and system level. It therefore provides a broad view on the various solutions that have to be used and their possible combination in very effective complementary techniques for both analog/mixed-signal and digital circuits. The feasibility of the described algorithms and built-in circuitry has been verified by measurements from the silicon prototypes fabricated in standard 90 nm and 65 nm CMOS technology.
Author: Sao-Jie Chen Publisher: Springer Science & Business Media ISBN: 1402050828 Category : Technology & Engineering Languages : en Pages : 106
Book Description
The 802.11n wireless standard uses 64-state quadrature amplitude modulation (64-QAM) to achieve higher spectral efficiency. Consequently, the transmitter and receiver require a higher signal to noise ratio with the same level of error rate performance. This book offers a fully-analog compensation technique without baseband circuitry to control the calibration process. Using an 802.11g transceiver design as an example, it describes in detail an auto-calibration mechanism for I/Q gains and phases imbalance.
Author: Jeroen A. Croon
Author: Jeroen A. Croon
Author: Jeroen A. Croon
Author: Christian C. Enz
Author: Arthur H.M. van Roermund
Author: Samar K. Saha
Author: Gennady Gildenblat
Author: Wai Shing Lau
Author: Mohamed Abu Rahma
Author: Amir Zjajo
Author: Sao-Jie Chen