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Author: Bhakta Kumar Roy Publisher: ISBN: Category : Combinatorial analysis Languages : en Pages : 338
Book Description
Two approaches to detection and diagnosis of single-gate failures are presented. One is an algebraic approach which derives minimal test sets by iterative intersections of higher dimensional cubes representing tests and the other is a tabular method that requires use of diagnostic tables. A diagnostic table lists gate sensitivities and network primary output values, with and without the failures present, for all possible inputs to the network. This information is used to locate a faulty gate and describe its failed function. Techniques for deriving minimal test sets and adaptive test schedules from diagnostic tables are also derived. The application of diagnostic tables to the deprivation of equivalence classes of faults in combinational networks is presented. A synthesis technique using diagnostic tables is also derived. The problem of diagnosable synthesis of combinational nets is considered. (Author).
Author: Bhakta Kumar Roy Publisher: ISBN: Category : Combinatorial analysis Languages : en Pages : 338
Book Description
Two approaches to detection and diagnosis of single-gate failures are presented. One is an algebraic approach which derives minimal test sets by iterative intersections of higher dimensional cubes representing tests and the other is a tabular method that requires use of diagnostic tables. A diagnostic table lists gate sensitivities and network primary output values, with and without the failures present, for all possible inputs to the network. This information is used to locate a faulty gate and describe its failed function. Techniques for deriving minimal test sets and adaptive test schedules from diagnostic tables are also derived. The application of diagnostic tables to the deprivation of equivalence classes of faults in combinational networks is presented. A synthesis technique using diagnostic tables is also derived. The problem of diagnosable synthesis of combinational nets is considered. (Author).
Author: Howard Warren Pribble Publisher: ISBN: Category : Languages : en Pages : 136
Book Description
Most fault detection and diagnosis systems in use today operate under the single-fault assumption, namely that the circuits will be tested often enough so that any single fault can be detected and corrected before another fault occurs. This reasoning fails when the circuit under test contains redundancy because of the undetectable faults which redundancy implies. While an undetectable fault will not affect the logical operation of the circuit, it was demonstrated by Friedman that the presence of an undetectable fault can cause other faults (the second-generation faults) to behave differently than in the normal case or even to become undetectable. The result of this fact is that a fault which cannot be detected and therefore is not corrected, may cause tests for other faults to become invalid. To prevent this, Friedman recommended the removal of 'certain kinds of redundancy.' (Author).
Author: V. N. Yarmolik Publisher: John Wiley & Sons ISBN: Category : Technology & Engineering Languages : en Pages : 216
Book Description
The continual explosion of computer development has led to inadequate coverage of proper & useful on-line testing techniques. This text fills the gap in the literature by presenting the latest techniques available for digital devices used in the most popular computers. Initial chapters explore the classic problems of on-line testing, pointing out the limited applications of conventional approaches to the problem of diagnosing digital devices using LSI & VLSI chips. Chapters 4-7 cover compact testing methods used to diagnose complex digital circuits. Chapters 8 & 9 analyze the techniques of compressing output responses of a digital circuit, while chapter 10 surveys promising recent signature generation techniques for binary sequences. The final chapter covers multi-output digital circuits.
Author: Mohamed Saled Soliman Mahmoud Publisher: ISBN: 9780355460582 Category : Languages : en Pages :
Book Description
The goals of fault diagnosis are to ascertain whether faults are present in (fault detection) and to identify them (fault location). Fault location is commonly performed with the aid of a fault dictionary. Fault dictionaries are constructed via fault simulation under the single fault assumption. The single fault-model often assumes a circuit is tested often enough such that no more than one physical defect is likely to occur between two consecutive test applications. This strategy is not valid when one physical defect manifests itself as multiple faults. It is observed that the presence of redundant faults also invalidates the frequent testing strategy, since a redundant fault may mask the existence of a detectable fault. In all these situations, a multiple fault model is required. However, in almost all practical cases a fault dictionary for multiple faults is infeasible to generate due to an exponential number of equivalence classes. In this dissertation, we first present a VHDL-based CAD tool that integrates design error injection, simulation, and diagnosis for digital circuits. The tool uses an FPGA-based board to inject error models in the design and compute the error free and erroneous signatures of internal lines. The signatures are later used for detection and diagnosis of errors for the circuit under test (CUT). Several experiments were conducted to demonstrate the capabilities of the tool. The obtained results demonstrate that the tool could detect and locate the source faulty node(s) within the CUT. Then, a new approach for a developed fault diagnosis method. Our approach is based on an enhanced deduction algorithm, which processes the actual response (effect) of CUT, to determine fault situations (causes). The main tool of our approach processes the response to deduce the internal signal values. A multiple stuck at fault model is implicitly employed and no-fault enumeration is required. The enhanced deduction algorithm is applicable to complicated combinational circuits. The internal values obtained are used to determine fault situations in CUT compatible with the applied test T and the response. Our analysis can identify fault locations and values (s-a-0 or s-a-1). Our main result is that any stuck fault can be diagnosed. Preliminary results demonstrate that our technique always achieves great accuracy for detecting and locating the faults, saving a large amount of time, especially for more complicated combinational circuits. The problems solved by our procedure are using deterministic test vectors. We next present a new approach for a developed fault diagnosis method. Our approach is based on an enhanced deduction algorithm and a backtracking strategy which can be regarded as a recursive process of value justification in which we first justify (explain) the values obtained at the primary outputs (POs). To justify a (0) value on the output of a- NAND gate (assuming it is normal), we need all the gate inputs to be (1). To justify a (1) value we need at least one input to have value (0). All the known values of internal normal lines must be justified by values of their predecessors. When both 0 and 1 values have been deduced for a gate output and it is critical, it is identified as normal and all its currently known values are analyzed. In some cases, we need to decide to select one of the possible ways to justify a (1) value on the output of a- NAND gate. If a decision leads to an inconsistency (self-contradictory state) with the forward propagated value, the algorithm will backtrack to the last decision point and try an alternative decision. After a decision is made, all the implications resulting from that decision are performed. If no inconsistency is detected, a new decision point is necessary. Otherwise, a solution has been obtained. A solution is a set of values which could have occurred in the CUT, that is, a possible set of actual values. The main tool of our approach processes the response to deduce the internal signal values in all possible solutions.
Author: Richard Saeks Publisher: Marcel Dekker ISBN: Category : Business & Economics Languages : en Pages : 264
Book Description
Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.
Author: Parag K. Lala Publisher: Academic Press ISBN: 9780124343306 Category : Computers Languages : en Pages : 222
Book Description
An easy to use introduction to the practices and techniques in the field of digital circuit testing. Lala writes in a user-friendly and tutorial style, making the book easy to read, even for the newcomer to fault-tolerant system design. Each informative chapter is self-contained, with little or no previous knowledge of a topic assumed. Extensive references follow each chapter.
Author: Rolf Isermann Publisher: Springer Science & Business Media ISBN: 3540303685 Category : Technology & Engineering Languages : en Pages : 478
Book Description
With increasing demands for efficiency and product quality plus progress in the integration of automatic control systems in high-cost mechatronic and safety-critical processes, the field of supervision (or monitoring), fault detection and fault diagnosis plays an important role. The book gives an introduction into advanced methods of fault detection and diagnosis (FDD). After definitions of important terms, it considers the reliability, availability, safety and systems integrity of technical processes. Then fault-detection methods for single signals without models such as limit and trend checking and with harmonic and stochastic models, such as Fourier analysis, correlation and wavelets are treated. This is followed by fault detection with process models using the relationships between signals such as parameter estimation, parity equations, observers and principal component analysis. The treated fault-diagnosis methods include classification methods from Bayes classification to neural networks with decision trees and inference methods from approximate reasoning with fuzzy logic to hybrid fuzzy-neuro systems. Several practical examples for fault detection and diagnosis of DC motor drives, a centrifugal pump, automotive suspension and tire demonstrate applications.
Author: Bhakta Kumar Roy
Author: Bhakta Kumar Roy
Author: Howard Warren Pribble
Author: S. Amaranathan
Author: Herbert Y. Chang
Author: V. N. Yarmolik
Author: Mohamed Saled Soliman Mahmoud
Author: Richard Saeks
Author: Parag K. Lala
Author: Rolf Isermann
Author: Melvin A. Breuer