Author: T. R. Myers
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 28
Book Description
Failures of Aluminum Metallizations on Silicon Integrated Circuits
Author: T. R. Myers
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 28
Book Description
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 28
Book Description
Metallization Failures in Integrated Circuits
Author: James Black
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 206
Book Description
The activation energy for the mass transport of aluminum by momentum exchange with conducting electrons has been obtained and equations relating temperature, current density and film structure to conductor life are presented. The activation energy for the reaction appears to be identical to that for the lattice self-diffusion of aluminum modified by factors involving both surface diffusion and grain boundary diffusion of aluminum in aluminum. These latter two factors can be important in films formed by the condensation of aluminum vapor. A method for determining the activation energy for the growth of etch pits into silicon normal to the 111 plane by the solid state diffusion of silicon into aluminum is presented. Studies made on the reduction of silica by aluminum films are described. It is noted that the reaction is rate limited under the aluminum film by the formation of a continuous barrier of aluminum oxide which effectively separates the two reactants. However, the reaction is free to take place at the edges of aluminum stripes where an effective barrier is not formed.
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 206
Book Description
The activation energy for the mass transport of aluminum by momentum exchange with conducting electrons has been obtained and equations relating temperature, current density and film structure to conductor life are presented. The activation energy for the reaction appears to be identical to that for the lattice self-diffusion of aluminum modified by factors involving both surface diffusion and grain boundary diffusion of aluminum in aluminum. These latter two factors can be important in films formed by the condensation of aluminum vapor. A method for determining the activation energy for the growth of etch pits into silicon normal to the 111 plane by the solid state diffusion of silicon into aluminum is presented. Studies made on the reduction of silica by aluminum films are described. It is noted that the reaction is rate limited under the aluminum film by the formation of a continuous barrier of aluminum oxide which effectively separates the two reactants. However, the reaction is free to take place at the edges of aluminum stripes where an effective barrier is not formed.
Metallization Systems for Integrated Circuits
Author: Rosemary P. Beatty
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 34
Book Description
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 34
Book Description
Failures of Aluminum Metalizations on Silicon Integrated Circuits
Author: T. R. Myers
Publisher:
ISBN:
Category :
Languages : en
Pages : 34
Book Description
The monograph discusses the failure of aluminum interconnecting metalization patterns used on silicon integrated circuits. The primary subject area is limited to those failures occurring in the metalized aluminum interconnecting stripes independent of their terminating interfaces. The subject is covered by first describing metalization failures at a gross level in terms of the function of the metalization and the manners in which it can fail, the means of detecting these failures, and the use of failure analysis techniques to determine the failure cause and phenomena. Section III describes the failure phenomena pertinent to metalization. A bibliography of references on metalization failures concludes the report.
Publisher:
ISBN:
Category :
Languages : en
Pages : 34
Book Description
The monograph discusses the failure of aluminum interconnecting metalization patterns used on silicon integrated circuits. The primary subject area is limited to those failures occurring in the metalized aluminum interconnecting stripes independent of their terminating interfaces. The subject is covered by first describing metalization failures at a gross level in terms of the function of the metalization and the manners in which it can fail, the means of detecting these failures, and the use of failure analysis techniques to determine the failure cause and phenomena. Section III describes the failure phenomena pertinent to metalization. A bibliography of references on metalization failures concludes the report.
Microelectronic Failure Analysis
Author:
Publisher: ASM International
ISBN: 0871707691
Category : Technology & Engineering
Languages : en
Pages : 160
Book Description
Provides new or expanded coverage on the latest techniques for microelectronic failure analysis. The CD-ROM includes the complete content of the book in fully searchable Adobe Acrobat format. Developed by the Electronic Device Failure Analysis Society (EDFAS) Publications Committee
Publisher: ASM International
ISBN: 0871707691
Category : Technology & Engineering
Languages : en
Pages : 160
Book Description
Provides new or expanded coverage on the latest techniques for microelectronic failure analysis. The CD-ROM includes the complete content of the book in fully searchable Adobe Acrobat format. Developed by the Electronic Device Failure Analysis Society (EDFAS) Publications Committee
Failure Analysis of Integrated Circuits
Author: Lawrence C. Wagner
Publisher: Springer Science & Business Media
ISBN: 1461549191
Category : Technology & Engineering
Languages : en
Pages : 256
Book Description
This "must have" reference work for semiconductor professionals and researchers provides a basic understanding of how the most commonly used tools and techniques in silicon-based semiconductors are applied to understanding the root cause of electrical failures in integrated circuits.
Publisher: Springer Science & Business Media
ISBN: 1461549191
Category : Technology & Engineering
Languages : en
Pages : 256
Book Description
This "must have" reference work for semiconductor professionals and researchers provides a basic understanding of how the most commonly used tools and techniques in silicon-based semiconductors are applied to understanding the root cause of electrical failures in integrated circuits.
NASA Technical Note
Influence of Temperature on Microelectronics and System Reliability
Author: Pradeep Lall
Publisher: CRC Press
ISBN: 0429611110
Category : Technology & Engineering
Languages : en
Pages : 327
Book Description
This book raises the level of understanding of thermal design criteria. It provides the design team with sufficient knowledge to help them evaluate device architecture trade-offs and the effects of operating temperatures. The author provides readers a sound scientific basis for system operation at realistic steady state temperatures without reliability penalties. Higher temperature performance than is commonly recommended is shown to be cost effective in production for life cycle costs. The microelectronic package considered in the book is assumed to consist of a semiconductor device with first-level interconnects that may be wirebonds, flip-chip, or tape automated bonds; die attach; substrate; substrate attach; case; lid; lid seal; and lead seal. The temperature effects on electrical parameters of both bipolar and MOSFET devices are discussed, and models quantifying the temperature effects on package elements are identified. Temperature-related models have been used to derive derating criteria for determining the maximum and minimum allowable temperature stresses for a given microelectronic package architecture. The first chapter outlines problems with some of the current modeling strategies. The next two chapters present microelectronic device failure mechanisms in terms of their dependence on steady state temperature, temperature cycle, temperature gradient, and rate of change of temperature at the chip and package level. Physics-of-failure based models used to characterize these failure mechanisms are identified and the variabilities in temperature dependence of each of the failure mechanisms are characterized. Chapters 4 and 5 describe the effects of temperature on the performance characteristics of MOS and bipolar devices. Chapter 6 discusses using high-temperature stress screens, including burn-in, for high-reliability applications. The burn-in conditions used by some manufacturers are examined and a physics-of-failure approach is described. The
Publisher: CRC Press
ISBN: 0429611110
Category : Technology & Engineering
Languages : en
Pages : 327
Book Description
This book raises the level of understanding of thermal design criteria. It provides the design team with sufficient knowledge to help them evaluate device architecture trade-offs and the effects of operating temperatures. The author provides readers a sound scientific basis for system operation at realistic steady state temperatures without reliability penalties. Higher temperature performance than is commonly recommended is shown to be cost effective in production for life cycle costs. The microelectronic package considered in the book is assumed to consist of a semiconductor device with first-level interconnects that may be wirebonds, flip-chip, or tape automated bonds; die attach; substrate; substrate attach; case; lid; lid seal; and lead seal. The temperature effects on electrical parameters of both bipolar and MOSFET devices are discussed, and models quantifying the temperature effects on package elements are identified. Temperature-related models have been used to derive derating criteria for determining the maximum and minimum allowable temperature stresses for a given microelectronic package architecture. The first chapter outlines problems with some of the current modeling strategies. The next two chapters present microelectronic device failure mechanisms in terms of their dependence on steady state temperature, temperature cycle, temperature gradient, and rate of change of temperature at the chip and package level. Physics-of-failure based models used to characterize these failure mechanisms are identified and the variabilities in temperature dependence of each of the failure mechanisms are characterized. Chapters 4 and 5 describe the effects of temperature on the performance characteristics of MOS and bipolar devices. Chapter 6 discusses using high-temperature stress screens, including burn-in, for high-reliability applications. The burn-in conditions used by some manufacturers are examined and a physics-of-failure approach is described. The
Reliability Abstracts and Technical Reviews
Author: United States. National Aeronautics and Space Administration. Office of Reliability and Quality Assurance
Publisher:
ISBN:
Category : Quality control
Languages : en
Pages : 610
Book Description
Publisher:
ISBN:
Category : Quality control
Languages : en
Pages : 610
Book Description