Author: Amin Jarrah Publisher: ISBN: Category : Computer engineering Languages : en Pages : 245
Book Description
The applications of digital signal processing continue to expand and use in many different areas such as signal processing, radar tracking, image processing, medical imaging, video broadcasting, and control algorithms for sensor array processing. Most of the signal processing applications are intensive and may not achieve the real time requirements. However, the Multi-core phenomenon has been embraced by almost all processor manufacturers and the road to the future is through parallel processing. Now we have many parallel processing platforms that developed for high performance such as: 1) Multi-Core/Many-Cores 2) Graphic Processing Units (GPU) 3) Field Programmable Gate Arrays (FPGA) This research work involves developing optimized parallel architectures of many signal processing applications such as Extensive Cancellation Algorithm (ECA), Direct Data Domain (D3), Block Compressive Sampling Matching Pursuit algorithm (BCoSaMP), video processing, Discrete Wavelet Transform (DWT), Particle Filter (PF), and Iterative Hard Thresholding (IHT) on different platforms such as Multi-core, FPGA and GPU. This is performed by exploring opportunities of any computation and storage that can be eliminated to achieve high performance and meet its real time requirements. Different techniques and ideas have also been derived from different advanced fields to increase the intelligibility and the usefulness of our research. A new innovative generalized method is proposed which can be very helpful for many researchers in various areas. Then, the applications have been moved higher ordering through implementing interfaces. This makes it adaptable by specifying all the input parameters of a certain application and fast prototyping through different performance evaluations. We propose and exploit many parallelization methods and optimization techniques in order to improve the latency, hardware usage, power consumption, cost, and reliability. These parallelization methods predict the data path and the control unit of the application processes. Also, the applications examine into numerical algorithms approaches to provide a transition from the research theory to the practice and to enhance the computational and resource requirements by adapting the certain algorithm for high performance applications. We exploit techniques coupled with high level synthesis tools by enabling rapid development to generate efficient parallel codes from high-level problem descriptions. This will reduce the design time, increase the productivity, improve the reliability, and enable exploration of the design space. Approaches will include optimizations based on mathematical and/or statistical reasoning, set theory, logic, and auto-tuning techniques. Hardware software co-design for these applications has been performed that pushes performance and energy efficiency while reducing cost, area, and overhead. This has been accomplished by developing a tool called Radar Signal Processing Tool (RSPT). RSPT allows the designer to auto-generate fully optimized VHDL representation of any of these signal processing algorithms by specifying many user input parameters through Graphic User Interface (GUI). This will offer great flexibility in designing signal processing applications for a System on Chip (SoC) without having to write a single line of VHDL code. RSPT also communicates with Xilinx toolset to check for the available FPGA parts installed with the Xilinx toolset and for executing the VHDL synthesis command chain. Moreover, it utilizes optimization techniques such as pipelining, code in-lining, loop unrolling, loops merging, and dataflow techniques by allowing the concurrent execution of operations to improve throughput and latency. Finally, RSPT provides the designer a feedback on various performance parameters such as occupied slices, maximum frequency, and dynamic range. This offers the designer the ability to make any adjustments to the algorithm component until the desired performance of the overall SoC is achieved. Parallel approach of IR Video processing is also proposed as it widely used in many numerous processing applications and not achieve the real time requirements. Analysis and assessment of the energy dissipation for heterogeneous Network on Chip (NoC) based Multiprocessor System on Chip (MPSoC) platform running a video application are performed. It identifies the latency, area, and energy bottlenecks of the entire heterogeneous platform including processors, interconnection wires, routers, memory, and caches etc. Also, we propose a new modeling and simulation approach regarding the channel width and buffer sizing which have a strong impact on the performance and the overhead of the chip. This approach monitors the state of each link in the NoC topology. Then, based on the congestion spot and the critical path we can optimize the design by changing channel width and buffer size until achieving the desired performance.
Author: Magdy A. Bayoumi Publisher: Springer Science & Business Media ISBN: 146153996X Category : Technology & Engineering Languages : en Pages : 289
Book Description
Over the past few years, the demand for high speed Digital Signal Proces sing (DSP) has increased dramatically. New applications in real-time image processing, satellite communications, radar signal processing, pattern recogni tion, and real-time signal detection and estimation require major improvements at several levels; algorithmic, architectural, and implementation. These perfor mance requirements can be achieved by employing parallel processing at all levels. Very Large Scale Integration (VLSI) technology supports and provides a good avenue for parallelism. Parallelism offers efficient sohitions to several problems which can arise in VLSI DSP architectures such as: 1. Intermediate data communication and routing: several DSP algorithms, such as FFT, involve excessive data routing and reordering. Parallelism is an efficient mechanism to minimize the silicon cost and speed up the pro cessing time of the intermediate middle stages. 2. Complex DSP applications: the required computation is almost doubled. Parallelism will allow two similar channels processing at the same time. The communication between the two channels has to be minimized. 3. Applicatilm specific systems: this emerging approach should achieve real-time performance in a cost-effective way. 4. Testability and fault tolerance: reliability has become a required feature in most of DSP systems. To achieve such property, the involved time overhead is significant. Parallelism may be the solution to maintain ac ceptable speed performance.
Author: Jian Li Publisher: Springer Science & Business Media ISBN: 9781402073977 Category : Computers Languages : en Pages : 234
Book Description
Radar Signal Processing and Its Applications brings together in one place important contributions and up-to-date research results in this fast-moving area. In twelve selected chapters, it describes the latest advances in architectures, design methods, and applications of radar signal processing. The contributors to this work were selected from the leading researchers and practitioners in the field. This work, originally published as Volume 14, Numbers 1-3 of the journal, Multidimensional Systems and Signal Processing, will be valuable to anyone working or researching in the field of radar signal processing. It serves as an excellent reference, providing insight into some of the most challenging issues being examined today.
Author: M. M. Jamali Publisher: ISBN: Category : Languages : en Pages : 138
Book Description
One of today's problems in signal processing is the identification of direction-of-arrival (DOA) for multiple broad-band sources. Many algorithms have been proposed in the literature, however, the algorithms are highly complex and require a lot of computing power. New technologies in the past two decades have decreased the cost of digital hardware, and its speed has increased to such an extent that digital signal processing has replaced a great deal of analog signal processing. This thesis presents a digital-domain parallel-pipelined architecture capable of computing the DOA of multiple broad-band sources in real-time. Broad-Band Signal-Subspace Spatial-Spectrum (BASS-ALE) Estimation algorithm has been selected for DOA estimation and has been simulated and verified through computer software programs. The BASS-ALE algorithm has been modified and parallelized. The parallel algorithm has been mapped on an architecture which is suitable for real-time computation.
Author: Dharma P. Agrawal Publisher: CRC Press ISBN: 9780849326189 Category : Computers Languages : en Pages : 174
Book Description
This set of technical books contains all the information presented at the 1995 International Conference on Parallel Processing. This conference, held August 14 - 18, featured over 100 lectures from more than 300 contributors, and included three panel sessions and three keynote addresses. The international authorship includes experts from around the globe, from Texas to Tokyo, from Leiden to London. Compiled by faculty at the University of Illinois and sponsored by Penn State University, these Proceedings are a comprehensive look at all that's new in the field of parallel processing.
Author: M. Moonen Publisher: Elsevier ISBN: 0080526977 Category : Computers Languages : en Pages : 425
Book Description
A comprehensive overview of the current evolution of research in algorithms, architectures and compilation for parallel systems is provided by this publication.The contributions focus specifically on domains where embedded systems are required, either oriented to application-specific or to programmable realisations. These are crucial in domains such as audio, telecom, instrumentation, speech, robotics, medical and automotive processing, image and video processing, TV, multimedia, radar and sonar.The book will be of particular interest to the academic community because of the detailed descriptions of research results presented. In addition, many contributions feature the "real-life" applications that are responsible for driving research and the impact of their specific characteristics on the methodologies is assessed.The publication will also be of considerable value to senior design engineers and CAD managers in the industrial arena, who wish either to anticipate the evolution of commercially available design tools or to utilize the presented concepts in their own R&D programmes.
Author: Peter Pirsch Publisher: Wiley ISBN: 9780471971450 Category : Technology & Engineering Languages : en Pages : 0
Book Description
Digital signal processing (DSP) covers a wide range of applicationssuch as signal acquisition, analysis, transmission, storage, andsynthesis. Special attention is needed for the VLSI (very largescale integration) implementation of high performance DSP systemswith examples from video and radar applications. This book providesbasic architectures for VLSI implementations of DSP tasks coveringarchitectures for application specific circuits and programmableDSP circuits. It fills an important gap in the literature byfocusing on the transition from algorithms specification toarchitectures for VLSI implementations. Areas coveredinclude: * architectures for basic operations and elementary functions * parallel processing and pipelining * application specific array processors * programmable digital signal processors With the fusion of signal processing algorithms and VLSI circuitdesign it will assist digital signal processing architecturedevelopers. This book is of particular interest to electronicengineering and computer science students and will benefitpractitioners of digital signal processor circuit design.
Author: Amin Jarrah
Author: Magdy A. Bayoumi
Author: Jian Li
Author: M. M. Jamali
Author: Dharma P. Agrawal
Author: M. Moonen
Author: 
Author: Timothy David Burnett
Author: Keith Bromley
Author: Peter Pirsch