Communication Channel Synthesis for Heterogeneous Embedded Systems PDF Download

Author: Michael Herbert Eisenring
Publisher: vdf Hochschulverlag AG
ISBN: 3728128678
Category : Embedded computer systems
Languages : en
Pages : 176

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Author: Paul Pop
Publisher: Springer Science & Business Media
ISBN: 9781402028724
Category : Computers
Languages : en
Pages : 362

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Book Description
Embedded computer systems are now everywhere: from alarm clocks to PDAs, from mobile phones to cars, almost all the devices we use are controlled by embedded computers. An important class of embedded computer systems is that of hard real-time systems, which have to fulfill strict timing requirements. As real-time systems become more complex, they are often implemented using distributed heterogeneous architectures. Analysis and Synthesis of Distributed Real-Time Embedded Systems addresses the design of real-time applications implemented using distributed heterogeneous architectures. The systems are heterogeneous not only in terms of hardware components, but also in terms of communication protocols and scheduling policies. Regarding this last aspect, time-driven and event-driven systems, as well as a combination of the two, are considered. Such systems are used in many application areas like automotive electronics, real-time multimedia, avionics, medical equipment, and factory systems. The proposed analysis and synthesis techniques derive optimized implementations that fulfill the imposed design constraints. An important part of the implementation process is the synthesis of the communication infrastructure, which has a significant impact on the overall system performance and cost. Analysis and Synthesis of Distributed Real-Time Embedded Systems considers the mapping and scheduling tasks within an incremental design process. To reduce the time-to-market of products, the design of real-time systems seldom starts from scratch. Typically, designers start from an already existing system, running certain applications, and the design problem is to implement new functionality on top of this system. Supporting such an incremental design process provides a high degree of flexibility, and can result in important reductions of design costs. STRONGAnalysis and Synthesis of Distributed Real-Time Embedded Systems will be of interest to advanced undergraduates, graduate students, researchers and designers involved in the field of embedded systems.

Author: Luigi Pomante
Publisher: River Publishers
ISBN: 8793379382
Category : Science
Languages : en
Pages : 272

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Book Description
Modern electronic systems consist of a fairly heterogeneous set of components. Today, a single system can be constituted by a hardware platform, frequently composed of a mix of analog and digital components, and by several software application layers. The hardware can include several heterogeneous microprocessors (e.g. GPP, DSP, GPU, etc.), dedicated ICs (ASICs and/or FPGAs), memories, a set of local connections between the system components, and some interfaces between the system and the environment (sensors, actuators, etc.). Therefore, on the one hand, multi-processor embedded systems are capable of meeting the demand of processing power and flexibility of complex applications. On the other hand, such systems are very complex to design and optimize, so that the design methodology plays a major role in determining the success of the products. For these reasons, to cope with the increasing system complexity, the approaches typically used today are oriented towards co-design methodologies working at the higher levels of abstraction. Unfortunately, such methodologies are typically customized for the specific application, suffer of a lack of generality and still need a considerable effort when real-size project are envisioned. Therefore, there is still the need for a general methodology able to support the designer during the high-level steps of a co-design flow, enabling an effective design space exploration before tackling the low-level steps and thus committing to the final technology. This should prevent costly redesign loops. In such a context, the work described in this book, composed of two parts, aims at providing models, methodologies and tools to support each step of the co-design flow of embedded systems implemented by exploiting heterogeneous multi-processor architectures mapped on distributed systems, as well as fully integrated onto a single chip. The first part focuses on issues like the analysis of system specification languages, and the analysis of existing system-level HW/SW co-simulation methodologies to support heterogeneous multi-processor architectures. The second part focuses mainly on Design Space Exploration, and it presents both some theoretical advancements with respect to the first part, and the development of a prototypal framework that provides practical exploitation of the proposed concepts.

Author: Sorin Alexander Huss
Publisher: Springer Science & Business Media
ISBN: 1402061498
Category : Technology & Engineering
Languages : en
Pages : 352

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Book Description
This book is the latest contribution to the Chip Design Languages series and it consists of selected papers presented at the Forum on Specifications and Design Languages (FDL'06), in September 2006. The book represents the state-of-the-art in research and practice, and it identifies new research directions. It highlights the role of specification and modelling languages, and presents practical experiences with specification and modelling languages.

Author: João Manuel Paiva Cardoso
Publisher: Springer Science & Business Media
ISBN: 1461448948
Category : Technology & Engineering
Languages : en
Pages : 211

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Book Description
This book provides techniques to tackle the design challenges raised by the increasing diversity and complexity of emerging, heterogeneous architectures for embedded systems. It describes an approach based on techniques from software engineering called aspect-oriented programming, which allow designers to control today’s sophisticated design tool chains, while maintaining a single application source code. Readers are introduced to the basic concepts of an aspect-oriented, domain specific language that enables control of a wide range of compilation and synthesis tools in the partitioning and mapping of an application to a heterogeneous (and possibly multi-core) target architecture. Several examples are presented that illustrate the benefits of the approach developed for applications from avionics and digital signal processing. Using the aspect-oriented programming techniques presented in this book, developers can reuse extensive sections of their designs, while preserving the original application source-code, thus promoting developer productivity as well as architecture and performance portability. Describes an aspect-oriented approach for the compilation and synthesis of applications targeting heterogeneous embedded computing architectures. Includes examples using an integrated tool chain for compilation and synthesis. Provides validation and evaluation for targeted reconfigurable heterogeneous architectures. Enables design portability, given changing target devices· Allows developers to maintain a single application source code when targeting multiple architectures.

Author:
Publisher:
ISBN:
Category :
Languages : en
Pages : 0

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Designers of distributed embedded systems face many challenges in determining the tradeoffs when defining a system architecture or retargeting an existing design. Communication synthesis, the automatic generation of the necessary software and hardware for system components to exchange data, is required to more effectively explore the design space and automate very error-prone tasks. This paper examines the problem of mapping a high-level specification to an arbitrary architecture that uses specific, common bus protocols for inter-processor communication. The communication model presented allows for easy retargeting to different bus topologies, protocols, and illustrates that global considerations are required to achieve a correct implementation. An algorithm is presented that partitions multihop communication timing constraints to effectively utilize the bus bandwidth along a message path. The communication synthesis tool is integrated with a system co-simulator to provide performance data for a given mapping.

Author: Smain Femmam
Publisher: Springer Nature
ISBN: 3031596196
Category :
Languages : en
Pages : 178

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Author: Gabriela Nicolescu
Publisher: Springer
ISBN: 9789400794962
Category : Technology & Engineering
Languages : en
Pages : 0

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Book Description
Design technology to address the new and vast problem of heterogeneous embedded systems design while remaining compatible with standard “More Moore” flows, i.e. capable of simultaneously handling both silicon complexity and system complexity, represents one of the most important challenges facing the semiconductor industry today and will be for several years to come. While the micro-electronics industry, over the years and with its spectacular and unique evolution, has built its own specific design methods to focus mainly on the management of complexity through the establishment of abstraction levels, the emergence of device heterogeneity requires new approaches enabling the satisfactory design of physically heterogeneous embedded systems for the widespread deployment of such systems. Heterogeneous Embedded Systems, compiled largely from a set of contributions from participants of past editions of the Winter School on Heterogeneous Embedded Systems Design Technology (FETCH), proposes a necessarily broad and holistic overview of design techniques used to tackle the various facets of heterogeneity in terms of technology and opportunities at the physical level, signal representations and different abstraction levels, architectures and components based on hardware and software, in all the main phases of design (modeling, validation with multiple models of computation, synthesis and optimization). It concentrates on the specific issues at the interfaces, and is divided into two main parts. The first part examines mainly theoretical issues and focuses on the modeling, validation and design techniques themselves. The second part illustrates the use of these methods in various design contexts at the forefront of new technology and architectural developments.

Author: Tobias Baumgartner
Publisher: Cuvillier Verlag
ISBN: 3736942737
Category : Computers
Languages : en
Pages : 172

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Book Description
Advances in the field of wireless sensor networks (WSNs) over the last decade have led to a great number of available hardware platforms and operating systems for embedded devices. With the upcoming research area called Internet of Things (IoT) even more new platforms appeared. Consequently, we are now faced with a vast amount of different embedded systems, ranging from tiny microcontrollers to comparably powerful smartphones. Unfortunately, this diversity of hardware architectures has not yet been fully addressed by any generic software architecture. Various operating systems for embedded devices are available, however, each of them cover only a few architectures. Using Java is not possible on tiny microcontrollers because of the lack of a Java Virtual Machine (JVM) on these platforms. Similarly, the entire field of testing is not geared towards dealing with the amount of heterogeneity. Testing environments are mostly homogeneous, and it is not possible to evaluate ideas on large-sized networks consisting of heterogeneous nodes. In this work, we present techniques to address the aforementioned problems. We introduce modern programming paradigms known from desktop computers and transfer these ideas to embedded systems. Furthermore, we built a testing platform consisting of heterogeneous wireless nodes and sensors. Finally, we present novel communication channels that are able to connect nodes that cannot communicate physically, or even real nodes with simulated ones. Hence, this work consists of three parts: While the dominant programming language on embedded systems is still C, we show that more efficient and comfortable results can be achieved by utilizing modern programming paradigms using C++. We therefore transfer the established template-based design of well-known libraries such as the Standard Template Library (STL) or Boost to embedded systems. After thoroughly studying the design of a software architecture based on C++, we present a successful implementation of our ideas: The Wiselib, a generic algorithms library for distributed heterogeneous embedded systems. To run algorithms in an appropriate test scenario, we built a heterogeneous testbed, consisting of different types of nodes and sensors. To this end, we installed self-designed low-cost load sensors based on strain gauges beneath the floor of a hallway in our institute, capable of identifying passers-by. The load sensors are wired to sensor nodes, which in turn allows for the design of sophisticated algorithms doing in-network data processing. The nodes are additionally connected to passive infrared sensors (PIRs) and actuator units---light-emitting diodes (LEDs) and speakers---for interaction with passers-by. The hallway serves as a platform for various application areas. Examples are target tracking, medical testing, and interactive games. Finally, we present virtualized communication links. This technique allows to connect nodes with incompatible radio transceivers or at distant locations. Furthermore, it can be used to let real nodes communicate with virtual nodes in a simulator, which allows for novel debugging mechanisms for distributed embedded systems such as the instantiation of unit tests.

Author: Ivan Radojevic
Publisher: Springer Science & Business Media
ISBN: 9400715943
Category : Technology & Engineering
Languages : en
Pages : 193

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Book Description
"Models of Computation for Heterogeneous Embedded Systems" presents a model of computation for heterogeneous embedded systems called DFCharts. It targets heterogeneous systems by combining finite state machines (FSM) with synchronous dataflow graphs (SDFG). FSMs are connected in the same way as in Argos (a Statecharts variant with purely synchronous semantics) using three operators: synchronous parallel, refinement and hiding. The fourth operator, called asynchronous parallel, is introduced in DFCharts to connect FSMs with SDFGs. In the formal semantics of DFCharts, the operation of an SDFG is represented as an FSM. Using this representation, SDFGs are merged with FSMs so that the behaviour of a complete DFCharts specification can be expressed as a single, flat FSM. This allows system properties to be verified globally. The practical application of DFCharts has been demonstrated by linking it to widely used system-level languages Java, Esterel and SystemC.