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Author: Helmut E. Graeb Publisher: Springer Science & Business Media ISBN: 1441969322 Category : Technology & Engineering Languages : en Pages : 302
Book Description
Integrated circuits are fundamental electronic components in biomedical, automotive and many other technical systems. A small, yet crucial part of a chip consists of analog circuitry. This part is still in large part designed by hand and therefore represents not only a bottleneck in the design flow, but also a permanent source of design errors responsible for re-designs, costly in terms of wasted test chips and in terms of lost time-to-market. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.
Author: Helmut E. Graeb Publisher: Springer Science & Business Media ISBN: 1441969322 Category : Technology & Engineering Languages : en Pages : 302
Book Description
Integrated circuits are fundamental electronic components in biomedical, automotive and many other technical systems. A small, yet crucial part of a chip consists of analog circuitry. This part is still in large part designed by hand and therefore represents not only a bottleneck in the design flow, but also a permanent source of design errors responsible for re-designs, costly in terms of wasted test chips and in terms of lost time-to-market. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.
Author: Koen Lampaert Publisher: Springer Science & Business Media ISBN: 9780792384793 Category : Technology & Engineering Languages : en Pages : 196
Book Description
Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a complete and sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.
Author: Ricardo Martins Publisher: Springer ISBN: 3319340603 Category : Technology & Engineering Languages : en Pages : 220
Book Description
This book introduces readers to a variety of tools for analog layout design automation. After discussing the placement and routing problem in electronic design automation (EDA), the authors overview a variety of automatic layout generation tools, as well as the most recent advances in analog layout-aware circuit sizing. The discussion includes different methods for automatic placement (a template-based Placer and an optimization-based Placer), a fully-automatic Router and an empirical-based Parasitic Extractor. The concepts and algorithms of all the modules are thoroughly described, enabling readers to reproduce the methodologies, improve the quality of their designs, or use them as starting point for a new tool. All the methods described are applied to practical examples for a 130nm design process, as well as placement and routing benchmark sets.
Author: Willy M Sansen Publisher: Springer Science & Business Media ISBN: 0387257470 Category : Technology & Engineering Languages : en Pages : 770
Book Description
This unique book contains all topics of importance to the analog designer which are essential to obtain sufficient insights to do a thorough job. The book starts with elementary stages in building up operational amplifiers. The synthesis of opamps is covered in great detail. Many examples are included, operating at low supply voltages. Chapters on noise, distortion, filters, ADC/DACs and oscillators follow. These are all based on the extensive amount of teaching that the author has carried out world-wide.
Author: Rob A. Rutenbar Publisher: John Wiley & Sons ISBN: 047122782X Category : Technology & Engineering Languages : en Pages : 773
Book Description
The tools and techniques you need to break the analog design bottleneck! Ten years ago, analog seemed to be a dead-end technology. Today, System-on-Chip (SoC) designs are increasingly mixed-signal designs. With the advent of application-specific integrated circuits (ASIC) technologies that can integrate both analog and digital functions on a single chip, analog has become more crucial than ever to the design process. Today, designers are moving beyond hand-crafted, one-transistor-at-a-time methods. They are using new circuit and physical synthesis tools to design practical analog circuits; new modeling and analysis tools to allow rapid exploration of system level alternatives; and new simulation tools to provide accurate answers for analog circuit behaviors and interactions that were considered impossible to handle only a few years ago. To give circuit designers and CAD professionals a better understanding of the history and the current state of the art in the field, this volume collects in one place the essential set of analog CAD papers that form the foundation of today's new analog design automation tools. Areas covered are: * Analog synthesis * Symbolic analysis * Analog layout * Analog modeling and analysis * Specialized analog simulation * Circuit centering and yield optimization * Circuit testing Computer-Aided Design of Analog Integrated Circuits and Systems is the cutting-edge reference that will be an invaluable resource for every semiconductor circuit designer and CAD professional who hopes to break the analog design bottleneck.
Author: Ricardo M. F. Martins Publisher: Springer Science & Business Media ISBN: 3642331467 Category : Technology & Engineering Languages : en Pages : 104
Book Description
This book presents an innovative methodology for the automatic generation of analog integrated circuits (ICs) layout, based on template descriptions and on evolutionary computational techniques. A design automation tool, LAYGEN II was implemented to validate the proposed approach giving special emphasis to reusability of expert design knowledge and to efficiency on retargeting operations.
Author: Henry Chang Publisher: Springer Science & Business Media ISBN: 9780792397946 Category : Computers Languages : en Pages : 394
Book Description
Analog circuit design is often the bottleneck when designing mixed analog-digital systems. A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits presents a new methodology based on a top-down, constraint-driven design paradigm that provides a solution to this problem. This methodology has two principal advantages: (1) it provides a high probability for the first silicon which meets all specifications, and (2) it shortens the design cycle. A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits is part of an ongoing research effort at the University of California at Berkeley in the Electrical Engineering and Computer Sciences Department. Many faculty and students, past and present, are working on this design methodology and its supporting tools. The principal goals are: (1) developing the design methodology, (2) developing and applying new tools, and (3) `proving' the methodology by undertaking `industrial strength' design examples. The work presented here is neither a beginning nor an end in the development of a complete top-down, constraint-driven design methodology, but rather a step in its development. This work is divided into three parts. Chapter 2 presents the design methodology along with foundation material. Chapters 3-8 describe supporting concepts for the methodology, from behavioral simulation and modeling to circuit module generators. Finally, Chapters 9-11 illustrate the methodology in detail by presenting the entire design cycle through three large-scale examples. These include the design of a current source D/A converter, a Sigma-Delta A/D converter, and a video driver system. Chapter 12 presents conclusions and current research topics. A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits will be of interest to analog and mixed-signal designers as well as CAD tool developers.
Author: Koen Lampaert Publisher: Springer Science & Business Media ISBN: 147574501X Category : Technology & Engineering Languages : en Pages : 186
Book Description
Analog integrated circuits are very important as interfaces between the digital parts of integrated electronic systems and the outside world. A large portion of the effort involved in designing these circuits is spent in the layout phase. Whereas the physical design of digital circuits is automated to a large extent, the layout of analog circuits is still a manual, time-consuming and error-prone task. This is mainly due to the continuous nature of analog signals, which causes analog circuit performance to be very sensitive to layout parasitics. The parasitic elements associated with interconnect wires cause loading and coupling effects that degrade the frequency behaviour and the noise performance of analog circuits. Device mismatch and thermal effects put a fundamental limit on the achievable accuracy of circuits. For successful automation of analog layout, advanced place and route tools that can handle these critical parasitics are required. In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability, the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a complete and sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction. Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability, the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications. Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.
Author: António Gusmão Publisher: Springer Nature ISBN: 3030500616 Category : Computers Languages : en Pages : 96
Book Description
In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs’ generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system’s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of these descriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies. In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model’s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem’s context (high label production cost), resulting in an efficient, inexpensive and fast model.
Author: Helmut E. Graeb
Author: Helmut E. Graeb
Author: Koen Lampaert
Author: Ricardo Martins
Author: Willy M Sansen
Author: Rob A. Rutenbar
Author: Ricardo M. F. Martins
Author: Henry Chang
Author: 
Author: Koen Lampaert
Author: António Gusmão