Author: Ibrahim N. HajjPublisher:
ISBN:
Category :
Languages : en
Pages : 0
Book Description
VLSI Design for Reliability
Author: Ibrahim N. HajjSoft Error Reliability of VLSI Circuits
Author: Behnam GhavamiPublisher: Springer Nature
ISBN: 3030516105
Category : Technology & Engineering
Languages : en
Pages : 114
Book Description
This book is intended for readers who are interested in the design of robust and reliable electronic digital systems. The authors cover emerging trends in design of today’s reliable electronic systems which are applicable to safety-critical applications, such as automotive or healthcare electronic systems. The emphasis is on modeling approaches and algorithms for analysis and mitigation of soft errors in nano-scale CMOS digital circuits, using techniques that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. The authors introduce software tools for analysis and mitigation of soft errors in electronic systems, which can be integrated easily with design flows. In addition to discussing soft error aware analysis techniques for combinational logic, the authors also describe new soft error mitigation strategies targeting commercial digital circuits. Coverage includes novel Soft Error Rate (SER) analysis techniques such as process variation aware SER estimation and GPU accelerated SER analysis techniques, in addition to SER reduction methods such as gate sizing and logic restructuring based SER techniques.
VLSI Design for Reliability-Hot Carrier Effects
Author: Publisher:
ISBN:
Category :
Languages : en
Pages : 76
Book Description
This report describes the accomplishments during the contract period (June 28, to June 27, 1992) on the computer aided analysis of CMOS device and circuit degradation due to hot-carrier effects. The task involved four subtasks: (1) simulation of gate oxide degradation during long-term circuit operation; (2) determination of overall circuit performance after hot-electron stress; (3) probabilistic timing approach to hot-carrier-effect estimation; (4) parametric macromodeling of hot-carrier-induced degradation in MOS VLSI circuits. The first two parts are continued subtasks while the latter two are new subtasks. In order to simulate the reliability of MOS circuits, both the detailed model and the macromodel are used; the detailed model is used for accurate analysis of small circuits and the macromodel is used for very large circuits for computational efficiency. Since the hot-carrier-induced aging of MOS circuits is input-pattern dependent, an important task is to develop a computationally efficient probabilistic timing approach to hot-carrier-effect estimation without resorting to the Monte Carlo simulation. We have developed a new probabilistic approach that accounts for cumulative effects of all input waveform combinations in a single run. VLSI reliability, Hot-carrier effects, Computer aided design.
Circuit Design for Reliability
Author: Ricardo ReisPublisher: Springer
ISBN: 1461440785
Category : Technology & Engineering
Languages : en
Pages : 271
Book Description
This book presents physical understanding, modeling and simulation, on-chip characterization, layout solutions, and design techniques that are effective to enhance the reliability of various circuit units. The authors provide readers with techniques for state of the art and future technologies, ranging from technology modeling, fault detection and analysis, circuit hardening, and reliability management.
Very Large Scale Integrated Design for Reliability
Author: Ibrahim N. HajjHot-Carrier Reliability of MOS VLSI Circuits
Author: Yusuf LeblebiciPublisher: Springer Science & Business Media
ISBN: 1461532507
Category : Technology & Engineering
Languages : en
Pages : 223
Book Description
As the complexity and the density of VLSI chips increase with shrinking design rules, the evaluation of long-term reliability of MOS VLSI circuits is becoming an important problem. The assessment and improvement of reliability on the circuit level should be based on both the failure mode analysis and the basic understanding of the physical failure mechanisms observed in integrated circuits. Hot-carrier induced degrada tion of MOS transistor characteristics is one of the primary mechanisms affecting the long-term reliability of MOS VLSI circuits. It is likely to become even more important in future generation chips, since the down ward scaling of transistor dimensions without proportional scaling of the operating voltage aggravates this problem. A thorough understanding of the physical mechanisms leading to hot-carrier related degradation of MOS transistors is a prerequisite for accurate circuit reliability evaluation. It is also being recognized that important reliability concerns other than the post-manufacture reliability qualification need to be addressed rigorously early in the design phase. The development and use of accurate reliability simulation tools are therefore crucial for early assessment and improvement of circuit reliability : Once the long-term reliability of the circuit is estimated through simulation, the results can be compared with predetermined reliability specifications or limits. If the predicted reliability does not satisfy the requirements, appropriate design modifications may be carried out to improve the resistance of the devices to degradation.
VLSI Design for Reliability
Author: VLSI Design and Test for Systems Dependability
Author: Shojiro AsaiPublisher: Springer
ISBN: 4431565949
Category : Technology & Engineering
Languages : en
Pages : 792
Book Description
This book discusses the new roles that the VLSI (very-large-scale integration of semiconductor circuits) is taking for the safe, secure, and dependable design and operation of electronic systems. The book consists of three parts. Part I, as a general introduction to this vital topic, describes how electronic systems are designed and tested with particular emphasis on dependability engineering, where the simultaneous assessment of the detrimental outcome of failures and cost of their containment is made. This section also describes the related research project “Dependable VLSI Systems,” in which the editor and authors of the book were involved for 8 years. Part II addresses various threats to the dependability of VLSIs as key systems components, including time-dependent degradations, variations in device characteristics, ionizing radiation, electromagnetic interference, design errors, and tampering, with discussion of technologies to counter those threats. Part III elaborates on the design and test technologies for dependability in such applications as control of robots and vehicles, data processing, and storage in a cloud environment and heterogeneous wireless telecommunications. This book is intended to be used as a reference for engineers who work on the design and testing of VLSI systems with particular attention to dependability. It can be used as a textbook in graduate courses as well. Readers interested in dependable systems from social and industrial–economic perspectives will also benefit from the discussions in this book.
VLSI Design for Reliability-Current Density
Author: Publisher:
ISBN:
Category :
Languages : en
Pages : 26
Book Description
This effort emphasizes the computation of the average and variance current density waveforms in the metal buses for estimating the MTF for electromigration effects. That effort is composed of two parts: The probabilistic simulation methods and software for computing the statistics of the current waveform at contact points to the buses; and the accurate extraction of the equivalent RC model of the bus for analyzing the bus currents. In addition, probabilistic methods have been applied to the calculation of the hot electron degradation in digital CMOS circuits, and the problem of estimating the maximum current (as opposed to the average) in the bus for worst case voltage drop analysis.
Author: Aseem Gupta