Author:
Publisher:
ISBN:
Category :
Languages : en
Pages : 78
Book Description
Verification of the FtCayuga Fault-tolerant Microprocessor System. Volume 2: Formal Specification and Correctness Theorems
Verification of the FtCayuga Fault-tolerant Microprocessor System. Volume 1: A Case Study in Theorem Prover-based Verification
Scientific and Technical Aerospace Reports
Verification of the FtCayuga Fault-tolerant Microprocessor System
Author: Mandayam Srivas
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 68
Book Description
Publisher:
ISBN:
Category : Computers
Languages : en
Pages : 68
Book Description
The Second NASA Formal Methods Workshop 1992
Formal Techniques in Real-Time and Fault-Tolerant Systems
Author: Jan Vytopil
Publisher: Springer Science & Business Media
ISBN: 1461532205
Category : Computers
Languages : en
Pages : 213
Book Description
Formal Techniques in Real-Time and Fault-Tolerant Systems focuses on the state of the art in formal specification, development and verification of fault-tolerant computing systems. The term `fault-tolerance' refers to a system having properties which enable it to deliver its specified function despite (certain) faults of its subsystem. Fault-tolerance is achieved by adding extra hardware and/or software which corrects the effects of faults. In this sense, a system can be called fault-tolerant if it can be proved that the resulting (extended) system under some model of reliability meets the reliability requirements. The main theme of Formal Techniques in Real-Time and Fault-Tolerant Systems can be formulated as follows: how do the specification, development and verification of conventional and fault-tolerant systems differ? How do the notations, methodology and tools used in design and development of fault-tolerant and conventional systems differ? Formal Techniques in Real-Time and Fault-Tolerant Systems is divided into two parts. The chapters in Part One set the stage for what follows by defining the basic notions and practices of the field of design and specification of fault-tolerant systems. The chapters in Part Two represent the `how-to' section, containing examples of the use of formal methods in specification and development of fault-tolerant systems. The book serves as an excellent reference for researchers in both academia and industry, and may be used as a text for advanced courses on the subject.
Publisher: Springer Science & Business Media
ISBN: 1461532205
Category : Computers
Languages : en
Pages : 213
Book Description
Formal Techniques in Real-Time and Fault-Tolerant Systems focuses on the state of the art in formal specification, development and verification of fault-tolerant computing systems. The term `fault-tolerance' refers to a system having properties which enable it to deliver its specified function despite (certain) faults of its subsystem. Fault-tolerance is achieved by adding extra hardware and/or software which corrects the effects of faults. In this sense, a system can be called fault-tolerant if it can be proved that the resulting (extended) system under some model of reliability meets the reliability requirements. The main theme of Formal Techniques in Real-Time and Fault-Tolerant Systems can be formulated as follows: how do the specification, development and verification of conventional and fault-tolerant systems differ? How do the notations, methodology and tools used in design and development of fault-tolerant and conventional systems differ? Formal Techniques in Real-Time and Fault-Tolerant Systems is divided into two parts. The chapters in Part One set the stage for what follows by defining the basic notions and practices of the field of design and specification of fault-tolerant systems. The chapters in Part Two represent the `how-to' section, containing examples of the use of formal methods in specification and development of fault-tolerant systems. The book serves as an excellent reference for researchers in both academia and industry, and may be used as a text for advanced courses on the subject.
Third NASA Langley Formal Methods Workshop
Author:
Publisher:
ISBN:
Category : Fault-tolerant computing
Languages : en
Pages : 274
Book Description
Publisher:
ISBN:
Category : Fault-tolerant computing
Languages : en
Pages : 274
Book Description
Government Reports Annual Index
Author:
Publisher:
ISBN:
Category : Government publications
Languages : en
Pages : 1336
Book Description
Publisher:
ISBN:
Category : Government publications
Languages : en
Pages : 1336
Book Description
Verification of the Ftcayuga Fault-Tolerant Microprocessor System. Volume 2
Author: National Aeronautics and Space Administration (NASA)
Publisher: Createspace Independent Publishing Platform
ISBN: 9781722864620
Category :
Languages : en
Pages : 76
Book Description
Presented here is a formal specification and verification of a property of a quadruplicately redundant fault tolerant microprocessor system design. A complete listing of the formal specification of the system and the correctness theorems that are proved are given. The system performs the task of obtaining interactive consistency among the processors using a special instruction on the processors. The design is based on an algorithm proposed by Pease, Shostak, and Lamport. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, providing certain preconditions hold, using a computer aided design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover. Bickford, Mark and Srivas, Mandayam Unspecified Center...
Publisher: Createspace Independent Publishing Platform
ISBN: 9781722864620
Category :
Languages : en
Pages : 76
Book Description
Presented here is a formal specification and verification of a property of a quadruplicately redundant fault tolerant microprocessor system design. A complete listing of the formal specification of the system and the correctness theorems that are proved are given. The system performs the task of obtaining interactive consistency among the processors using a special instruction on the processors. The design is based on an algorithm proposed by Pease, Shostak, and Lamport. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, providing certain preconditions hold, using a computer aided design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover. Bickford, Mark and Srivas, Mandayam Unspecified Center...