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Author: Suk Bae Joo Publisher: ISBN: Category : Languages : en Pages :
Book Description
Non-uniformity in chemical-mechanical planarization (CMP) due to diverse pattern geometry in copper damascene structures has been a critical limit to process yield. Fundamental understanding in tribology and electrochemistry is crucial to solve this problem. This research develops novel triboelectrochemical techniques to characterize the polished wafer surface and to understand mechanisms of materials removal. There are two approaches in this research. Experimentally, a setup containing a tribometer and a potentiostat was built. It enabled simultaneous measurement in friction coefficient and electrochemical response of wafer materials. Theoretically, electrochemical reactions and Hertzian contact were analyzed on ECMPed wafers in terms of mechanisms of step height reduction in anodic and cathodic ECMP in corresponds to surface chemistry. Results revealed the nature of limitation of ECMP for global planarization. In order to further the fundamental investigation of ECMP, the potentiostatic electrochemical impedance spectroscopy (EIS) was utilized to study the interface kinetics. It was revealed that the formation of Cu oxide films was affected by the electrical potentials. Through in situ measurement, it was found that the tribological behavior depend on the surface chemistry and surface morphology under the influence of anodic potentials. The potentiodynamic polarization results explained the removal and formation mechanisms of interface. The results showed that the cycle of passivation/removal was a function of mechanical factor such as the load and speed. The new model was developed via material removal rate (MRR) in both electrochemical and mechanical aspects. The quantitative contribution of electrochemical potential to overall removal was established for the first time. It was further confirmed by Ru and the electrochemical constant j was developed for metal ECMP. This dissertation includes seven chapters. Chapter I Introduction and II Motivation and Objectives are followed by the materials setup and testing conditions discussed in Chapter III. The tribological and electrochemical characterization of the Cu patterned geometry is discussed in Chapter IV. Chapter V discusses the kinetics of the interface during polishing and its removal mechanisms. Chapter VI discusses the synergism of ECMP, followed by Conclusions and Future work. The electronic version of this dissertation is accessible from http://hdl.handle.net/1969.1/149288
Author: Suk Bae Joo Publisher: ISBN: Category : Languages : en Pages :
Book Description
Non-uniformity in chemical-mechanical planarization (CMP) due to diverse pattern geometry in copper damascene structures has been a critical limit to process yield. Fundamental understanding in tribology and electrochemistry is crucial to solve this problem. This research develops novel triboelectrochemical techniques to characterize the polished wafer surface and to understand mechanisms of materials removal. There are two approaches in this research. Experimentally, a setup containing a tribometer and a potentiostat was built. It enabled simultaneous measurement in friction coefficient and electrochemical response of wafer materials. Theoretically, electrochemical reactions and Hertzian contact were analyzed on ECMPed wafers in terms of mechanisms of step height reduction in anodic and cathodic ECMP in corresponds to surface chemistry. Results revealed the nature of limitation of ECMP for global planarization. In order to further the fundamental investigation of ECMP, the potentiostatic electrochemical impedance spectroscopy (EIS) was utilized to study the interface kinetics. It was revealed that the formation of Cu oxide films was affected by the electrical potentials. Through in situ measurement, it was found that the tribological behavior depend on the surface chemistry and surface morphology under the influence of anodic potentials. The potentiodynamic polarization results explained the removal and formation mechanisms of interface. The results showed that the cycle of passivation/removal was a function of mechanical factor such as the load and speed. The new model was developed via material removal rate (MRR) in both electrochemical and mechanical aspects. The quantitative contribution of electrochemical potential to overall removal was established for the first time. It was further confirmed by Ru and the electrochemical constant j was developed for metal ECMP. This dissertation includes seven chapters. Chapter I Introduction and II Motivation and Objectives are followed by the materials setup and testing conditions discussed in Chapter III. The tribological and electrochemical characterization of the Cu patterned geometry is discussed in Chapter IV. Chapter V discusses the kinetics of the interface during polishing and its removal mechanisms. Chapter VI discusses the synergism of ECMP, followed by Conclusions and Future work. The electronic version of this dissertation is accessible from http://hdl.handle.net/1969.1/149288
Author: M. Grasserbauer Publisher: Wiley ISBN: 9780471950134 Category : Technology & Engineering Languages : en Pages : 0
Book Description
This book presents, for the first time, a comprehensive survey ofanalytical techniques currently used in support of all stages ofmicroelectronic materials and device processing. The diversity oftopics covered in this book has been achieved by bringing togetheran international field of authors contributing specializedindividual chapters. This has ensured that each technique isdiscussed in detail giving in-depth treatments of the subjectmatter. A particularly helpful feature in this book is the concisetechnical summary given at the end of each section. Four majorareas are considered in this volume: * Bulk analysis of microelectronic materials * Analysis of surfaces, interfaces and thin films * Structure analysis on an atomic scale * Characterization of physical, electrical and topographicfeatures Complete with over 400 illustrations, this volume is anindispensible guide to analytical support for the microelectronicindustry.
Author: R.A. Levy Publisher: Springer Science & Business Media ISBN: 9400909179 Category : Technology & Engineering Languages : en Pages : 992
Book Description
The primary thrust of very large scale integration (VLS!) is the miniaturization of devices to increase packing density, achieve higher speed, and consume lower power. The fabrication of integrated circuits containing in excess of four million components per chip with design rules in the submicron range has now been made possible by the introduction of innovative circuit designs and the development of new microelectronic materials and processes. This book addresses the latter challenge by assessing the current status of the science and technology associated with the production of VLSI silicon circuits. It represents the cumulative effort of experts from academia and industry who have come together to blend their expertise into a tutorial overview and cohesive update of this rapidly expanding field. A balance of fundamental and applied contributions cover the basics of microelectronics materials and process engineering. Subjects in materials science include silicon, silicides, resists, dielectrics, and interconnect metallization. Subjects in process engineering include crystal growth, epitaxy, oxidation, thin film deposition, fine-line lithography, dry etching, ion implantation, and diffusion. Other related topics such as process simulation, defects phenomena, and diagnostic techniques are also included. This book is the result of a NATO-sponsored Advanced Study Institute (AS!) held in Castelvecchio Pascoli, Italy. Invited speakers at this institute provided manuscripts which were edited, updated, and integrated with other contributions solicited from non-participants to this AS!.
Author: C.R.M. Grovenor Publisher: Routledge ISBN: 1351431544 Category : Science Languages : en Pages : 557
Book Description
This practical book shows how an understanding of structure, thermodynamics, and electrical properties can explain some of the choices of materials used in microelectronics, and can assist in the design of new materials for specific applications. It emphasizes the importance of the phase chemistry of semiconductor and metal systems for ensuring the long-term stability of new devices. The book discusses single-crystal and polycrystalline silicon, aluminium- and gold-based metallisation schemes, packaging semiconductor devices, failure analysis, and the suitability of various materials for optoelectronic devices and solar cells. It has been designed for senior undergraduates, graduates, and researchers in physics, electronic engineering, and materials science.
Author: L. A. Casper Publisher: ISBN: Category : Language Arts & Disciplines Languages : en Pages : 464
Book Description
Examines leading-edge developments in the field of materials development. Covers all major aspects of materials science, with applications to many high technology areas. Explores the role of chemistry in high-tech materials and their applications.
Author: C. R. M. Grovenor Publisher: ISBN: 9780783739281 Category : Languages : en Pages : 554
Book Description
This practical book shows how an understanding of structure, thermodynamics, and electrical properties can explain some of the choices of materials used in microelectronics, and can assist in the design of new materials for specific applications. It emphasizes the importance of the phase chemistry of semiconductor and metal systems for ensuring the long-term stability of new devices. The book discusses single-crystal and polycrystalline silicon, aluminium- and gold-based metallisation schemes, packaging semiconductor devices, failure analysis, and the suitability of various materials for optoelectronic devices and solar cells. It has been designed for senior undergraduates, graduates, and researchers in physics, electronic engineering, and materials science.
Author: Yannick Le Tiec Publisher: John Wiley & Sons ISBN: 1118578120 Category : Technology & Engineering Languages : en Pages : 261
Book Description
Microelectronics is a complex world where many sciences need to collaborate to create nano-objects: we need expertise in electronics, microelectronics, physics, optics and mechanics also crossing into chemistry, electrochemistry, as well as biology, biochemistry and medicine. Chemistry is involved in many fields from materials, chemicals, gases, liquids or salts, the basics of reactions and equilibrium, to the optimized cleaning of surfaces and selective etching of specific layers. In addition, over recent decades, the size of the transistors has been drastically reduced while the functionality of circuits has increased. This book consists of five chapters covering the chemicals and sequences used in processing, from cleaning to etching, the role and impact of their purity, along with the materials used in “Front End Of the Line” which corresponds to the heart and performance of individual transistors, then moving on to the “Back End Of the Line” which is related to the interconnection of all the transistors. Finally, the need for specific functionalization also requires key knowledge on surface treatments and chemical management to allow new applications. Contents 1. Chemistry in the “Front End of the Line” (FEOL): Deposits, Gate Stacks, Epitaxy and Contacts, François Martin, Jean-Michel Hartmann, Véronique Carron and Yannick Le Tiec. 2. Chemistry in Interconnects, Vincent Jousseaume, Paul-Henri Haumesser, Carole Pernel, Jeffery Butterbaugh, Sylvain Maîtrejean and Didier Louis. 3. The Chemistry of Wet Surface Preparation: Cleaning, Etching and Drying, Yannick Le Tiec and Martin Knotter. 4. The Use and Management of Chemical Fluids in Microelectronics, Christiane Gottschalk, Kevin Mclaughlin, Julie Cren, Catherine Peyne and Patrick Valenti. 5. Surface Functionalization for Micro- and Nanosystems: Application to Biosensors, Antoine Hoang, Gilles Marchand, Guillaume Nonglaton, Isabelle Texier-Nogues and Francoise Vinet. About the Authors Yannick Le Tiec is a technical expert at CEA-Leti, Minatec since 2002. He is a CEA-Leti assignee at IBM, Albany (NY) to develop the advanced 14 nm CMOS node and the FDSOI technology. He held different technical positions from the advanced 300 mm SOI CMOS pilot line to different assignments within SOITEC for advanced wafer development and later within INES to optimize solar cell ramp-up and yield. He has been part of the ITRS Front End technical working group at ITRS since 2008.
Author: Milind Sudhakar Kulkarni Publisher: ISBN: Category : Languages : en Pages :
Book Description
To achieve efficient planarization with reduced device dimensions in integrated circuits, a better understanding of the physics, chemistry, and the complex interplay involved in chemical mechanical planarization (CMP) is needed. The CMP process takes place at the interface of the pad and wafer in the presence of the fluid slurry medium. The hardness of Cu is significantly less than the slurry abrasive particles which are usually alumina or silica. It has been accepted that a surface layer can protect the Cu surface from scratching during CMP. Four competing mechanisms in materials removal have been reported: the chemical dissolution of Cu, the mechanical removal through slurry abrasives, the formation of thin layer of Cu oxide and the sweeping surface material by slurry flow. Despite the previous investigation of Cu removal, the electrochemical properties of Cu surface layer is yet to be understood. The motivation of this research was to understand the fundamental aspects of removal mechanisms in terms of electrochemical interactions, chemical dissolution, mechanical wear, and factors affecting planarization. Since one of the major requirements in CMP is to have a high surface finish, i.e., low surface roughness, optimization of the surface finish in reference to various parameters was emphasized. Three approaches were used in this research: in situ measurement of material removal, exploration of the electropotential activation and passivation at the copper surface and modeling of the synergistic electrochemical-mechanical interactions on the copper surface. In this research, copper polishing experiments were conducted using a table top tribometer. A potentiostat was coupled with this tribometer. This combination enabled the evaluation of important variables such as applied pressure, polishing speed, slurry chemistry, pH, materials, and applied DC potential. Experiments were designed to understand the combined and individual effect of electrochemical interactions as well as mechanical impact during polishing. Extensive surface characterization was performed with AFM, SEM, TEM and XPS. An innovative method for direct material removal measurement on the nanometer scale was developed and used. Experimental observations were compared with the theoretically calculated material removal rate values. The synergistic effect of all of the components of the process, which result in a better quality surface finish was quantitatively evaluated for the first time. Impressed potential during CMP proved to be a controlling parameter in the material removal mechanism. Using the experimental results, a model was developed, which provided a practical insight into the CMP process. The research is expected to help with electrochemical material removal in copper planarization with low-k dielectrics.
Author: Suk Bae Joo
Author: Suk Bae Joo
Author: M. Grasserbauer
Author: R.A. Levy
Author: C.R.M. Grovenor
Author: L. A. Casper
Author: C. R. M. Grovenor
Author: William D. Brown
Author: Yannick Le Tiec
Author: Eds.)
Author: Milind Sudhakar Kulkarni