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Author: William K.C. Lam Publisher: Springer Science & Business Media ISBN: 1461526884 Category : Technology & Engineering Languages : en Pages : 290
Book Description
Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing.
Author: William K.C. Lam Publisher: Springer Science & Business Media ISBN: 1461526884 Category : Technology & Engineering Languages : en Pages : 290
Book Description
Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing.
Author: Yves Crama Publisher: Cambridge University Press ISBN: 1139498630 Category : Mathematics Languages : en Pages : 711
Book Description
Written by prominent experts in the field, this monograph provides the first comprehensive, unified presentation of the structural, algorithmic and applied aspects of the theory of Boolean functions. The book focuses on algebraic representations of Boolean functions, especially disjunctive and conjunctive normal form representations. This framework looks at the fundamental elements of the theory (Boolean equations and satisfiability problems, prime implicants and associated short representations, dualization), an in-depth study of special classes of Boolean functions (quadratic, Horn, shellable, regular, threshold, read-once functions and their characterization by functional equations) and two fruitful generalizations of the concept of Boolean functions (partially defined functions and pseudo-Boolean functions). Several topics are presented here in book form for the first time. Because of the depth and breadth and its emphasis on algorithms and applications, this monograph will have special appeal for researchers and graduate students in discrete mathematics, operations research, computer science, engineering and economics.
Author: Dimitrios Soudris Publisher: Springer ISBN: 3540453733 Category : Computers Languages : en Pages : 349
Book Description
This book constitutes the refereed proceedings of the 10th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2000, held in Göttingen, Germany in September 2000. The 33 revised full papers presented were carefully reviewed and selected for inclusion in the book. The papers are organized in sections on RTL power modeling, power estimation and optimization, system-level design, transistor level design, asynchronous circuit design, power efficient technologies, design of multimedia processing applications, adiabatic design and arithmetic modules, and analog-digital circuit modeling.
Author: Mukund Sivaraman Publisher: Springer Science & Business Media ISBN: 1441985786 Category : Technology & Engineering Languages : en Pages : 164
Book Description
Large system complexities and operation under tight timing constraints in rapidly shrinking technologies have made it extremely important to ensure correct temporal behavior of modern-day digital circuits, both before and after fabrication. Research in (pre-fabrication) timing verification and (post-fabrication) delay fault testing has evolved along largely disjoint lines in spite of the fact that they share many basic concepts. A Unified Approach for Timing Verification and Delay Fault Testing applies concepts developed in the context of delay fault testing to path sensitization, which allows an accurate timing analysis mechanism to be developed. This path sensitization strategy is further applied for efficient delay fault diagnosis and delay fault coverage estimation. A new path sensitization strategy called Signal Stabilization Time Analysis (SSTA) has been developed based on the fact that primitive PDFs determine the stabilization time of the circuit outputs. This analysis has been used to develop a feasible method of identifying the primitive PDFs in a general multi-level logic circuit. An approach to determine the maximum circuit delay using this primitive PDF identification mechanism is also presented. The Primitive PDF Identification-based Timing Analysis (PITA) approach is proved to determine the maximum floating mode circuit delay exactly under any component delay model, and provides several advantages over previously floating mode timing analyzers. A framework for the diagnosis of circuit failures caused by distributed path delay faults is also presented. A metric to quantify the diagnosability of a path delay fault for a test is also proposed. Finally, the book presents a very realistic metric for delay fault coverage which accounts for delay fault size distributions and is applicable to any delay fault model. A Unified Approach for Timing Verification and Delay Fault Testing will be of interest to university and industry researchers in timing analysis and delay fault testing as well as EDA tool development engineers and design verification engineers dealing with timing issues in ULSI circuits. The book should also be of interest to digital designers and others interested in knowing the state of the art in timing verification and delay fault testing.
Author: Ryan O'Donnell Publisher: Cambridge University Press ISBN: 1107038324 Category : Computers Languages : en Pages : 445
Book Description
This graduate-level text gives a thorough overview of the analysis of Boolean functions, beginning with the most basic definitions and proceeding to advanced topics.
Author: Alan Burns Publisher: Cambridge University Press ISBN: 1139464353 Category : Computers Languages : en Pages : 476
Book Description
Ada is the only ISO-standard, object-oriented, concurrent, real-time programming language. It is intended for use in large, long-lived applications where reliability and efficiency are essential, particularly real-time and embedded systems. In this book, Alan Burns and Andy Wellings give a thorough, self-contained account of how the Ada tasking model can be used to construct a wide range of concurrent and real-time systems. This is the only book that focuses on an in-depth discussion of the Ada tasking model. Following on from the authors' earlier title Concurrency in Ada, this book brings the discussion up to date to include the new Ada 2005 language and the recent advances in real-time programming techniques. It will be of value to software professionals and advanced students of programming alike: indeed every Ada programmer will find it essential reading and a primary reference work that will sit alongside the language reference manual.
Author: Igor Chikalov Publisher: Springer Science & Business Media ISBN: 3642226612 Category : Technology & Engineering Languages : en Pages : 108
Book Description
Decision tree is a widely used form of representing algorithms and knowledge. Compact data models and fast algorithms require optimization of tree complexity. This book is a research monograph on average time complexity of decision trees. It generalizes several known results and considers a number of new problems. The book contains exact and approximate algorithms for decision tree optimization, and bounds on minimum average time complexity of decision trees. Methods of combinatorics, probability theory and complexity theory are used in the proofs as well as concepts from various branches of discrete mathematics and computer science. The considered applications include the study of average depth of decision trees for Boolean functions from closed classes, the comparison of results of the performance of greedy heuristics for average depth minimization with optimal decision trees constructed by dynamic programming algorithm, and optimization of decision trees for the corner point recognition problem from computer vision. The book can be interesting for researchers working on time complexity of algorithms and specialists in test theory, rough set theory, logical analysis of data and machine learning.
Author: Reiner W. Hartenstein Publisher: Springer Science & Business Media ISBN: 9783540649489 Category : Computers Languages : en Pages : 808
Book Description
This book constitutes the refereed proceedings of the 8th International Workshop on Field-Programmable Logics and Applications, FPL '98, held in Tallinn, Estonia, in August/September 1998. The 39 revised full papers presented were carefully selected for inclusion in the book from a total of 86 submissions. Also included are 30 refereed high-quality posters. The papers are organized in topical sections on design methods, general aspects, prototyping and simulation, development methods, accelerators, system architectures, hardware/software codesign, system development, algorithms on FPGAs, and applications.
Author: William K.C. Lam
Author: William K.C. Lam
Author: Ingo Wegener
Author: Yves Crama
Author: Dimitrios Soudris
Author: Mukund Sivaraman
Author: Ryan O'Donnell
Author: Alan Burns
Author: Igor Chikalov
Author: B. Courcelle
Author: Reiner W. Hartenstein