Author: Publisher:
ISBN:
Category : Combustion
Languages : en
Pages : 682
Book Description
Proceedings of the ASME Heat Transfer Division
Author: Thermal Management of Die Stacking Architecture that Includes Memory and Logic Processor
Author: Bhavani Prasad Dewan SandurPublisher: ProQuest
ISBN: 9780542810671
Category : Mechanical engineering
Languages : en
Pages :
Book Description
This thesis focuses on carrying out a parametric study of stacking memory and the logic processor on the same substrate. In present technologies, logic processor and memory packages are located side-by-side on the board or they are packaged separately and then stacked on top of each other (Package-on-package [PoP]). Mixing memory and logic processor in the same stack has advantage and challenges, but requires the integration ability of economies-of-scale. The technology needed for packaging memory and logic dice on the same substrate is completely different as compared to packaging only memory dice or logic dice, or, packaging memory and logic separately and creating a single functional package [PoP]. Geometries needed were generated by using Pro/EngineerRTM Wildfire(TM) 2.0 as a Computer-Aided-Design (CAD) tool and were transferred to ANSYSRTM Workbench(TM) 10.0, where meshed analysis was conducted. Package architectures evaluated were rotated stack, staggered stack utilizing redistributed pads, and stacking with spacers, while all other parameters were held constant. The values of these parameters were determined to give a junction temperature of 100°C, which is an unacceptable value due to wafer level electromigration. A discussion is presented as to what parameters need to be adjusted in order to meet the required thermal design specification. In that light, a list of solutions consisting of increasing the heat transfer co-efficient on top of the package, the use of underfill, improved thermal conductivity of the PCB, and the use of a copper heat spreader were evaluated. Results are evaluated in the light of market segment requirements. (Abstract shortened by UMI.).
Die-stacking Architecture
Author: Yuan XiePublisher: Springer Nature
ISBN: 3031017471
Category : Technology & Engineering
Languages : en
Pages : 113
Book Description
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.
Handbook of 3D Integration, Volume 4
Author: Paul D. FranzonPublisher: John Wiley & Sons
ISBN: 3527697063
Category : Technology & Engineering
Languages : en
Pages : 655
Book Description
This fourth volume of the landmark handbook focuses on the design, testing, and thermal management of 3D-integrated circuits, both from a technological and materials science perspective. Edited and authored by key contributors from top research institutions and high-tech companies, the first part of the book provides an overview of the latest developments in 3D chip design, including challenges and opportunities. The second part focuses on the test methods used to assess the quality and reliability of the 3D-integrated circuits, while the third and final part deals with thermal management and advanced cooling technologies and their integration.
Vertical 3D Memory Technologies
Author: Betty PrincePublisher: John Wiley & Sons
ISBN: 1118760468
Category : Technology & Engineering
Languages : en
Pages : 466
Book Description
The large scale integration and planar scaling of individual system chips is reaching an expensive limit. If individual chips now, and later terrabyte memory blocks, memory macros, and processing cores, can be tightly linked in optimally designed and processed small footprint vertical stacks, then performance can be increased, power reduced and cost contained. This book reviews for the electronics industry engineer, professional and student the critical areas of development for 3D vertical memory chips including: gate-all-around and junction-less nanowire memories, stacked thin film and double gate memories, terrabit vertical channel and vertical gate stacked NAND flash, large scale stacking of Resistance RAM cross-point arrays, and 2.5D/3D stacking of memory and processor chips with through-silicon-via connections now and remote links later. Key features: Presents a review of the status and trends in 3-dimensional vertical memory chip technologies. Extensively reviews advanced vertical memory chip technology and development Explores technology process routes and 3D chip integration in a single reference
NANO-CHIPS 2030
Author: Boris MurmannPublisher: Springer Nature
ISBN: 3030183386
Category : Science
Languages : en
Pages : 597
Book Description
In this book, a global team of experts from academia, research institutes and industry presents their vision on how new nano-chip architectures will enable the performance and energy efficiency needed for AI-driven advancements in autonomous mobility, healthcare, and man-machine cooperation. Recent reviews of the status quo, as presented in CHIPS 2020 (Springer), have prompted the need for an urgent reassessment of opportunities in nanoelectronic information technology. As such, this book explores the foundations of a new era in nanoelectronics that will drive progress in intelligent chip systems for energy-efficient information technology, on-chip deep learning for data analytics, and quantum computing. Given its scope, this book provides a timely compendium that hopes to inspire and shape the future of nanoelectronics in the decades to come.
Design Automation of Cyber-Physical Systems
Author: Mohammad Abdullah Al FaruquePublisher: Springer
ISBN: 3030130509
Category : Technology & Engineering
Languages : en
Pages : 292
Book Description
This book presents the state-of-the-art and breakthrough innovations in design automation for cyber-physical systems.The authors discuss various aspects of cyber-physical systems design, including modeling, co-design, optimization, tools, formal methods, validation, verification, and case studies. Coverage includes a survey of the various existing cyber-physical systems functional design methodologies and related tools will provide the reader unique insights into the conceptual design of cyber-physical systems.
3D IC Stacking Technology
Author: Banqiu WuPublisher: McGraw Hill Professional
ISBN: 0071741968
Category : Technology & Engineering
Languages : en
Pages : 543
Book Description
The latest advances in three-dimensional integrated circuit stacking technology With a focus on industrial applications, 3D IC Stacking Technology offers comprehensive coverage of design, test, and fabrication processing methods for three-dimensional device integration. Each chapter in this authoritative guide is written by industry experts and details a separate fabrication step. Future industry applications and cutting-edge design potential are also discussed. This is an essential resource for semiconductor engineers and portable device designers. 3D IC Stacking Technology covers: High density through silicon stacking (TSS) technology Practical design ecosystem for heterogeneous 3D IC products Design automation and TCAD tool solutions for through silicon via (TSV)-based 3D IC stack Process integration for TSV manufacturing High-aspect-ratio silicon etch for TSV Dielectric deposition for TSV Barrier and seed deposition Copper electrodeposition for TSV Chemical mechanical polishing for TSV applications Temporary and permanent bonding Assembly and test aspects of TSV technology
Design of 3D Integrated Circuits and Systems
Author: Rohit SharmaPublisher: CRC Press
ISBN: 1351831593
Category : Technology & Engineering
Languages : en
Pages : 328
Book Description
Three-dimensional (3D) integration of microsystems and subsystems has become essential to the future of semiconductor technology development. 3D integration requires a greater understanding of several interconnected systems stacked over each other. While this vertical growth profoundly increases the system functionality, it also exponentially increases the design complexity. Design of 3D Integrated Circuits and Systems tackles all aspects of 3D integration, including 3D circuit and system design, new processes and simulation techniques, alternative communication schemes for 3D circuits and systems, application of novel materials for 3D systems, and the thermal challenges to restrict power dissipation and improve performance of 3D systems. Containing contributions from experts in industry as well as academia, this authoritative text: Illustrates different 3D integration approaches, such as die-to-die, die-to-wafer, and wafer-to-wafer Discusses the use of interposer technology and the role of Through-Silicon Vias (TSVs) Presents the latest improvements in three major fields of thermal management for multiprocessor systems-on-chip (MPSoCs) Explores ThruChip Interface (TCI), NAND flash memory stacking, and emerging applications Describes large-scale integration testing and state-of-the-art low-power testing solutions Complete with experimental results of chip-level 3D integration schemes tested at IBM and case studies on advanced complementary metal–oxide–semiconductor (CMOS) integration for 3D integrated circuits (ICs), Design of 3D Integrated Circuits and Systems is a practical reference that not only covers a wealth of design issues encountered in 3D integration but also demonstrates their impact on the efficiency of 3D systems.
Modeling and Design of Electromagnetic Compatibility for High-Speed Printed Circuit Boards and Packaging
Author: Xing-Chang WeiPublisher: CRC Press
ISBN: 1315305852
Category : Computers
Languages : en
Pages : 251
Book Description
Modeling and Design of Electromagnetic Compatibility for High-Speed Printed Circuit Boards and Packaging presents the electromagnetic modelling and design of three major electromagnetic compatibility (EMC) issues related to the high-speed printed circuit board (PCB) and electronic packages: signal integrity (SI), power integrity (PI), and electromagnetic interference (EMI). The emphasis is put on two essential passive components of PCBs and packages: the power distribution network and the signal distribution network. This book includes two parts. Part one talks about the field-circuit hybrid methods used for the EMC modeling, including the modal method, the integral equation method, the cylindrical wave expansion method and the de-embedding method. Part two illustrates EMC design methods and explores the applications of novel metamaterials and two-dimensional materials on traditional EMC problems. This book is designed to enhance worthwhile electromagnetic theory and mathematical methods for practical engineers and to train students with advanced EMC applications.