Author: Hasan Eli ElhuniPublisher:
ISBN:
Category :
Languages : en
Pages : 268
Book Description
Techniques for Design and Testing of Iterative and Systolic Arrays
Author: Hasan Eli ElhuniDesign & Test Techniques for VLSI & WSI Circuits
Author: R. E. MassaraPublisher: Institution of Electrical Engineers
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 332
Book Description
This book provides an up-to-date view of VLSI and WSI design and test methodologies, combining an introduction to the topics covered with an indication of current research directions and results. The coverage is thus suitable for undergraduates studying microelectronic systems design, for postgraduate researchers and for graduate engineers and managers seeking an overview or introduction to semi- and full-custom large-scale chip design.
Integration of Test with Design and Manufacturing
Author: IEEE Computer SocietyPublisher: IEEE Computer Society Press
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 1192
Book Description
INIS Atomindex
Author: Design of Logic Systems
Author: DAVID PROTHEROE DOUGLAS LEWINPublisher: Springer
ISBN: 1489968563
Category : Computers
Languages : en
Pages : 713
Book Description
Advanced Techniques for Embedded Systems Design and Test
Author: Juan C. LópezPublisher: Springer Science & Business Media
ISBN: 1475744196
Category : Computers
Languages : en
Pages : 298
Book Description
As electronic technology reaches the point where complex systems can be integrated on a single chip, and higher degrees of performance can be achieved at lower costs, designers must devise new ways to undertake the laborious task of coping with the numerous, and non-trivial, problems that arise during the conception of such systems. On the other hand, shorter design cycles (so that electronic products can fit into shrinking market windows) put companies, and consequently designers, under pressure in a race to obtain reliable products in the minimum period of time. New methodologies, supported by automation and abstraction, have appeared which have been crucial in making it possible for system designers to take over the traditional electronic design process and embedded systems is one of the fields that these methodologies are mainly targeting. The inherent complexity of these systems, with hardware and software components that usually execute concurrently, and the very tight cost and performance constraints, make them specially suitable to introduce higher levels of abstraction and automation, so as to allow the designer to better tackle the many problems that appear during their design. Advanced Techniques for Embedded Systems Design and Test is a comprehensive book presenting recent developments in methodologies and tools for the specification, synthesis, verification, and test of embedded systems, characterized by the use of high-level languages as a road to productivity. Each specific part of the design process, from specification through to test, is looked at with a constant emphasis on behavioral methodologies. Advanced Techniques for Embedded Systems Design and Test is essential reading for all researchers in the design and test communities as well as system designers and CAD tools developers.
Wafer-Level Integrated Systems
Author: Stuart K. TewksburyPublisher: Springer Science & Business Media
ISBN: 1461316251
Category : Technology & Engineering
Languages : en
Pages : 456
Book Description
From the perspective of complex systems, conventional Ie's can be regarded as "discrete" devices interconnected according to system design objectives imposed at the circuit board level and higher levels in the system implementation hierarchy. However, silicon monolithic circuits have progressed to such complex functions that a transition from a philosophy of integrated circuits (Ie's) to one of integrated sys tems is necessary. Wafer-scale integration has played an important role over the past few years in highlighting the system level issues which will most significantly impact the implementation of complex monolithic systems and system components. Rather than being a revolutionary approach, wafer-scale integration will evolve naturally from VLSI as defect avoidance, fault tolerance and testing are introduced into VLSI circuits. Successful introduction of defect avoidance, for example, relaxes limits imposed by yield and cost on Ie dimensions, allowing the monolithic circuit's area to be chosen according to the natural partitioning of a system into individual functions rather than imposing area limits due to defect densities. The term "wafer level" is perhaps more appropriate than "wafer-scale". A "wafer-level" monolithic system component may have dimensions ranging from conventional yield-limited Ie dimensions to full wafer dimensions. In this sense, "wafer-scale" merely represents the obvious upper practical limit imposed by wafer sizes on the area of monolithic circuits. The transition to monolithic, wafer-level integrated systems will require a mapping of the full range of system design issues onto the design of monolithic circuit.
Design and Testing of Regular Circuits
Author: Ronald DeShawn BlantonPublisher:
ISBN:
Category :
Languages : en
Pages : 256
Book Description
Scientific and Technical Aerospace Reports
Author: Publisher:
ISBN:
Category : Aeronautics
Languages : en
Pages : 700
Book Description
Lists citations with abstracts for aerospace related reports obtained from world wide sources and announces documents that have recently been entered into the NASA Scientific and Technical Information Database.
Proceedings of the International Conference on Application Specific Array Processors
Author: Sun Yuan KungPublisher:
ISBN:
Category : Application-specific integrated circuits
Languages : en
Pages : 832
Book Description