Author: Bernd BeckerPublisher:
ISBN:
Category :
Languages : en
Pages : 10
Book Description
Structure based methods for parallel pattern fault simulation in combinational circuits
Author: Bernd BeckerStructure based methods for parallel pattern fault simulation in combinatorial circuits
Author: Parallel Pattern Fault Simulation Based on Stem Faults in Combinational Circuits
Author: Ohyoung SongSimulation in the Design of Digital Electronic Systems
Author: John B. GoslingPublisher: Cambridge University Press
ISBN: 9780521426725
Category : Computers
Languages : en
Pages : 302
Book Description
This description of the structure of simulators suitable for use in the design of digital electronic systems includes the compiled code and event driven algorithms for digital electronic system simulators, together with timing verification as well as structural limitations and problems.
Proceedings
Author: Publisher:
ISBN:
Category : Application-specific integrated circuits
Languages : en
Pages : 638
Book Description
Testing of Digital Systems
Author: N. K. JhaPublisher: Cambridge University Press
ISBN: 9781139437431
Category : Computers
Languages : en
Pages : 1022
Book Description
Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.
Boolean Circuit Rewiring
Author: Tak-Kei LamPublisher: John Wiley & Sons
ISBN: 1118750136
Category : Technology & Engineering
Languages : en
Pages : 304
Book Description
Demonstrates techniques which will allow rewiring rates ofover 95%, enabling adoption of deep sub-micron chips for industrialapplications Logic synthesis is an essential part of the modern digital ICdesign process in semi-conductor industry. This book discusses alogic synthesis technique called “rewiring” and itslatest technical advancement in term of rewirability. Rewiringtechnique has surfaced in academic research since 1993 and there iscurrently no book available on the market which systematically andcomprehensively discusses this rewiring technology. The authorscover logic transformation techniques with concentration onrewiring. For many decades, the effect of wiring on logicstructures has been ignored due to an ideal view of wires and theirnegligible role in the circuit performance. However intoday’s semiconductor technology wiring is the major playerin circuit performance degeneration and logic synthesis engines canbe improved to deal with this through wire-based transformations.This book introduces the automatic test pattern generation(ATPG)-based rewiring techniques, which are recently active in therealm of logic synthesis/verification of VLSI/SOC designs. Unique comprehensive coverage of semiconductor rewiringtechniques written by leading researchers in the field Provides complete coverage of rewiring from an introductory tointermediate level Rewiring is explained as a flexible technique for Boolean logicsynthesis, introducing the concept of Boolean circuittransformation and testing, with examples Readers can directly apply the described techniques toreal-world VLSI design issues Focuses on the automatic test pattern generation (ATPG) basedrewiring methods although some non-ATPG based rewiring methods suchas graph based alternative wiring (GBAW), and “set of pairsof functions to be distinguished” (SPFD) based rewiring arealso discussed A valuable resource for researchers and postgraduate students inVLSI and SoC design, as well as digital design engineers, EDAsoftware developers, and design automation experts that specializein the synthesis and optimization of logical circuits.
Data Parallel Fault Simulation for Combinational and Sequential Circuits
Author: Minesh Balkrishan AminPublisher:
ISBN:
Category :
Languages : en
Pages : 264
Book Description
Modelling and Simulation 1992
Author: John StephensonPublisher: Society for Computer Simulation International
ISBN:
Category : Computers
Languages : en
Pages : 722
Book Description
Architecture Design and Validation Methods
Author: Egon BörgerPublisher: Springer Science & Business Media
ISBN: 3642571999
Category : Computers
Languages : en
Pages : 363
Book Description
This state-of-the-art survey gives a systematic presentation of recent advances in the design and validation of computer architectures. The book covers a comprehensive range of architecture design and validation methods, from computer aided high-level design of VLSI circuits and systems to layout and testable design, including the modeling and synthesis of behavior and dataflow, cell-based logic optimization, machine assisted verification, and virtual machine design.