Author: G. C. JainPublisher:
ISBN:
Category :
Languages : en
Pages : 0
Book Description
Optimising automatic fault detection and diagnostics for large sequential logic networks
Author: G. C. JainOptimising Automatic Fault Detection and Diagnostics
Author: A Study of Fault Diagnosis of Sequential Logic Networks
Author: B. D. CarrollPublisher:
ISBN:
Category :
Languages : en
Pages : 25
Book Description
The research conducted on this project was concerned with the problem of test pattern generation for sequential logic circuits. More specifically, an algorithm was sought for generating test patterns for detecting single stuck-at faults in synchronous sequential circuits containing clocked flip-flop memory elements. In addition to the principal problem stated above, the related problems of test pattern generation for combinational iterative logic arrays and of test pattern generation for multiple faults in combinational logic circuits were also studied. A summary of the results obtained and the conclusions reached on the above problems is given. Suggestions for follow-on studies are discussed. Reprints of all papers published on the project are included in an appendix.
On Fault Diagnosis
Author: Louis Gwo-Jiun ChuPublisher:
ISBN:
Category : Electric network analysis
Languages : en
Pages : 334
Book Description
Rational Fault Analysis
Author: Richard SaeksPublisher: Marcel Dekker
ISBN:
Category : Business & Economics
Languages : en
Pages : 264
Book Description
Information on the development of rational procedures for detection, location, & prediction of faults in a variety of systems. Includes a chapter on computer-aided fault analysis.
Fault Detection Tests for Combinational Logic Networks
Author: Daniel Charles ScavezzePublisher:
ISBN:
Category :
Languages : en
Pages : 162
Book Description
An Algorithm for Automatic Fault Detection in Sequential Circuits
Author: Donald Whitesell HartmanPublisher:
ISBN:
Category :
Languages : en
Pages : 180
Book Description
Scientific and Technical Aerospace Reports
Author: Secondary Techniques for Increasing Fault Coverage of Fault Detection Test Sequences for Asynchronous Sequential Networks
Author: Lewis Ronald HooverPublisher:
ISBN:
Category : Fault location (Engineering)
Languages : en
Pages : 136
Book Description
"The generation of fault detection sequences for asynchronous sequential networks is considered here. Several techniques exist for the generation of fault detection sequences on combinational and clocked sequential networks. Although these techniques provide closed solutions for combinational and clocked networks, they meet with much less success when used as strategies on asynchronous networks. It is presently assumed that the general asynchronous problem defies closed solution. For this reason, a secondary procedure is presented here to facilitate increased fault coverage by a given fault detection test sequence. This procedure is successful on all types of logic networks but is, perhaps, most useful in the asynchronous case since this is the problem on which other techniques fail. The secondary procedure has been designed to improve the fault coverage accomplished by any fault detection sequence regardless of the origin of the sequence. The increased coverage is accomplished by a minimum amount of additional internal hardware and/or a minimum of additional package outputs. The procedure presented here will function as part of an overall digital fault detection system, which will be composed of: 1) a compatible digital logic simulator, 2) a set of fault detection sequence generators, 3) secondary procedures for increasing fault coverage, 4) procedures to allow for diagnosis to a variable level. This research is directed at presenting a complete solution to the problems involved with developing secondary procedures for increasing the fault coverage of fault detection sequences "--Abstract, pages ii-iii.
Science Abstracts
Author: Publisher:
ISBN:
Category : Electrical engineering
Languages : en
Pages : 1360
Book Description