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Author: Michael Nicolaidis Publisher: Springer Science & Business Media ISBN: 1475760698 Category : Technology & Engineering Languages : en Pages : 152
Book Description
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Author: Michael Nicolaidis Publisher: Springer Science & Business Media ISBN: 1475760698 Category : Technology & Engineering Languages : en Pages : 152
Book Description
Test functions (fault detection, diagnosis, error correction, repair, etc.) that are applied concurrently while the system continues its intended function are defined as on-line testing. In its expanded scope, on-line testing includes the design of concurrent error checking subsystems that can be themselves self-checking, fail-safe systems that continue to function correctly even after an error occurs, reliability monitoring, and self-test and fault-tolerant designs. On-Line Testing for VLSI contains a selected set of articles that discuss many of the modern aspects of on-line testing as faced today. The contributions are largely derived from recent IEEE International On-Line Testing Workshops. Guest editors Michael Nicolaidis, Yervant Zorian and Dhiraj Pradhan organized the articles into six chapters. In the first chapter the editors introduce a large number of approaches with an expanded bibliography in which some references date back to the sixties. On-Line Testing for VLSI is an edited volume of original research comprising invited contributions by leading researchers.
Author: Shojiro Asai Publisher: Springer ISBN: 4431565949 Category : Technology & Engineering Languages : en Pages : 800
Book Description
This book discusses the new roles that the VLSI (very-large-scale integration of semiconductor circuits) is taking for the safe, secure, and dependable design and operation of electronic systems. The book consists of three parts. Part I, as a general introduction to this vital topic, describes how electronic systems are designed and tested with particular emphasis on dependability engineering, where the simultaneous assessment of the detrimental outcome of failures and cost of their containment is made. This section also describes the related research project “Dependable VLSI Systems,” in which the editor and authors of the book were involved for 8 years. Part II addresses various threats to the dependability of VLSIs as key systems components, including time-dependent degradations, variations in device characteristics, ionizing radiation, electromagnetic interference, design errors, and tampering, with discussion of technologies to counter those threats. Part III elaborates on the design and test technologies for dependability in such applications as control of robots and vehicles, data processing, and storage in a cloud environment and heterogeneous wireless telecommunications. This book is intended to be used as a reference for engineers who work on the design and testing of VLSI systems with particular attention to dependability. It can be used as a textbook in graduate courses as well. Readers interested in dependable systems from social and industrial–economic perspectives will also benefit from the discussions in this book.
Author: M. Bushnell Publisher: Springer Science & Business Media ISBN: 0306470403 Category : Technology & Engineering Languages : en Pages : 690
Book Description
The modern electronic testing has a forty year history. Test professionals hold some fairly large conferences and numerous workshops, have a journal, and there are over one hundred books on testing. Still, a full course on testing is offered only at a few universities, mostly by professors who have a research interest in this area. Apparently, most professors would not have taken a course on electronic testing when they were students. Other than the computer engineering curriculum being too crowded, the major reason cited for the absence of a course on electronic testing is the lack of a suitable textbook. For VLSI the foundation was provided by semiconductor device techn- ogy, circuit design, and electronic testing. In a computer engineering curriculum, therefore, it is necessary that foundations should be taught before applications. The field of VLSI has expanded to systems-on-a-chip, which include digital, memory, and mixed-signalsubsystems. To our knowledge this is the first textbook to cover all three types of electronic circuits. We have written this textbook for an undergraduate “foundations” course on electronic testing. Obviously, it is too voluminous for a one-semester course and a teacher will have to select from the topics. We did not restrict such freedom because the selection may depend upon the individual expertise and interests. Besides, there is merit in having a larger book that will retain its usefulness for the owner even after the completion of the course. With equal tenacity, we address the needs of three other groups of readers.
Author: Laung-Terng Wang Publisher: Elsevier ISBN: 0080474799 Category : Technology & Engineering Languages : en Pages : 809
Book Description
This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures.
Author: Angela Krstic Publisher: Springer Science & Business Media ISBN: 1461555973 Category : Technology & Engineering Languages : en Pages : 201
Book Description
In the early days of digital design, we were concerned with the logical correctness of circuits. We knew that if we slowed down the clock signal sufficiently, the circuit would function correctly. With improvements in the semiconductor process technology, our expectations on speed have soared. A frequently asked question in the last decade has been how fast can the clock run. This puts significant demands on timing analysis and delay testing. Fueled by the above events, a tremendous growth has occurred in the research on delay testing. Recent work includes fault models, algorithms for test generation and fault simulation, and methods for design and synthesis for testability. The authors of this book, Angela Krstic and Tim Cheng, have personally contributed to this research. Now they do an even greater service to the profession by collecting the work of a large number of researchers. In addition to expounding such a great deal of information, they have delivered it with utmost clarity. To further the reader's understanding many key concepts are illustrated by simple examples. The basic ideas of delay testing have reached a level of maturity that makes them suitable for practice. In that sense, this book is the best x DELAY FAULT TESTING FOR VLSI CIRCUITS available guide for an engineer designing or testing VLSI systems. Tech niques for path delay testing and for use of slower test equipment to test high-speed circuits are of particular interest.
Author: T. W. Williams Publisher: North Holland ISBN: Category : Computers Languages : en Pages : 296
Book Description
This book covers the spectrum of the testing problem. Areas covered include fault modeling, test generation, fault simulation, memory testing, design for testability, testability measures, PLA testing, and test equipment. The use of this volume will provide a good insight into the VLSI challenges in the area of testing - an area that has become increasingly important due to the emphasis on quality of VLSI products, and the associated costs. As a result, there has been a rapid expansion in the technologies associated with testing, and it is this technological growth which is reflected in the contributions to this volume.
Author: Ravi K. Gulati Publisher: Springer Science & Business Media ISBN: 1461531462 Category : Computers Languages : en Pages : 121
Book Description
Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from an intuitive sense that CMOS ICs showing abnormal quiescent power supply current (IDDQ) contained defects. Later, this intuition was supported by data and analysis in the 1980s by Levi (RACD, Malaiya and Su (SUNY-Binghamton), Soden and Hawkins (Sandia Labs and the University of New Mexico), Jacomino and co-workers (Laboratoire d'Automatique de Grenoble), and Maly and co-workers (Carnegie Mellon University). Interest in IDDQ testing has advanced beyond the data reported in the 1980s and is now focused on applications and evaluations involving larger volumes of ICs that improve quality beyond what can be achieved by previous conventional means. In the conventional style of testing one attempts to propagate the logic states of the suspended nodes to primary outputs. This is done for all or most nodes of the circuit. For sequential circuits, in particular, the complexity of finding suitable tests is very high. In comparison, the IDDQ test does not observe the logic states, but measures the integrated current that leaks through all gates. In other words, it is like measuring a patient's temperature to determine the state of health. Despite perceived advantages, during the years that followed its initial announcements, skepticism about the practicality of IDDQ testing prevailed. The idea, however, provided a great opportunity to researchers. New results on test generation, fault simulation, design for testability, built-in self-test, and diagnosis for this style of testing have since been reported. After a decade of research, we are definitely closer to practice.
Author: Paul H. Bardell Publisher: Wiley-Interscience ISBN: Category : Technology & Engineering Languages : en Pages : 376
Book Description
This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
Author: Nicola Nicolici Publisher: Springer Science & Business Media ISBN: 0306487314 Category : Technology & Engineering Languages : en Pages : 182
Book Description
This text focuses on techniques for minimizing power dissipation during test application at logic and register-transfer levels of abstraction of the VLSI design flow. It surveys existing techniques and presents several test automation techniques for reducing power in scan-based sequential circuits and BIST data paths.
Author: Manoj Sachdev Publisher: Springer Science & Business Media ISBN: 0387465472 Category : Technology & Engineering Languages : en Pages : 343
Book Description
The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and yield. The chapter on RAM testing has been updated with focus on parametric and SRAM stability testing. Similarly, newer material has been incorporated in digital fault modeling and analog testing chapters. The strength of Defect Oriented Testing for nano-Metric CMOS VLSIs lies in its industrial relevance.
Author: Michael Nicolaidis
Author: Michael Nicolaidis
Author: Shojiro Asai
Author: M. Bushnell
Author: Laung-Terng Wang
Author: Angela Krstic
Author: T. W. Williams
Author: Ravi K. Gulati
Author: Paul H. Bardell
Author: Nicola Nicolici
Author: Manoj Sachdev