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Author: Kyle Joshua Lyson Publisher: ISBN: Category : Microwave detectors Languages : en Pages : 252
Book Description
The lack of high quality factor integrated inductors is a significant impediment to realizing high performance Radio Frequency Integrated Circuits (RFICs) within conventional digital CMOS. While passive spiral inductors continue to improve with different approaches and fabrication techniques, they tend to be large and lossy. Therefore, an accurate inductance with high quality factor and small chip area would be an extremely useful component for RFIC designers. The focus of this thesis is realizing accurate, high-quality factor inductance using an active circuit approach for implementation in RFIC applications. It is demonstrated that, when implemented in a conventional digital CMOS process, the standard active inductor topology suffers greatly, in terms of performance and stability, over the transistor process corners and thus some form of an automatic tuning approach is necessary for these devices to be used reliably. Consequently, a master-slave tuning circuit was designed and included in order to tune the active inductor over the process corners of the AMIS C5 process. Simulated results are presented that verify the functionality of the proposed active inductor topology. In addition, simulation results utilizing an automatically tuned inductor within a two-way lumped element Wilkinson power divider demonstrates the utility of the chosen approach. Considerations for adapting this approach for use in a scaled CMOS process are discussed.
Author: Kyle Joshua Lyson Publisher: ISBN: Category : Microwave detectors Languages : en Pages : 252
Book Description
The lack of high quality factor integrated inductors is a significant impediment to realizing high performance Radio Frequency Integrated Circuits (RFICs) within conventional digital CMOS. While passive spiral inductors continue to improve with different approaches and fabrication techniques, they tend to be large and lossy. Therefore, an accurate inductance with high quality factor and small chip area would be an extremely useful component for RFIC designers. The focus of this thesis is realizing accurate, high-quality factor inductance using an active circuit approach for implementation in RFIC applications. It is demonstrated that, when implemented in a conventional digital CMOS process, the standard active inductor topology suffers greatly, in terms of performance and stability, over the transistor process corners and thus some form of an automatic tuning approach is necessary for these devices to be used reliably. Consequently, a master-slave tuning circuit was designed and included in order to tune the active inductor over the process corners of the AMIS C5 process. Simulated results are presented that verify the functionality of the proposed active inductor topology. In addition, simulation results utilizing an automatically tuned inductor within a two-way lumped element Wilkinson power divider demonstrates the utility of the chosen approach. Considerations for adapting this approach for use in a scaled CMOS process are discussed.
Author: Paulo Augusto Dal Fabbro Publisher: Springer Science & Business Media ISBN: 9048193613 Category : Technology & Engineering Languages : en Pages : 171
Book Description
Advances in electronics have pushed mankind to create devices, ranging from - credible gadgets to medical equipment to spacecraft instruments. More than that, modern society is getting used to—if not dependent on—the comfort, solutions, and astonishing amount of information brought by these devices. One ?eld that has continuously bene?tted from those advances is the radio frequency integrated c- cuit (RFIC) design, which in its turn has promoted countless bene?ts to the mankind as a payback. Wireless communications is one prominent example of what the - vances in electronics have enabled and their consequences to our daily life. How could anyone back in the eighties think of the possibilities opened by the wireless local area networks (WLANs) that can be found today in a host of places, such as public libraries, coffee shops, trains, to name just a few? How can a youngster, who lives this true WLAN experience nowadays, imagine a world without it? This book dealswith the design oflinearCMOS RF PowerAmpli?ers(PAs). The RF PA is a very important part of the RF transceiver, the device that enables wireless communications. Two important aspects that are key to keep the advances in RF PA design at an accelerate pace are treated: ef?ciency enhancement and frequen- tunable capability. For this purpose, the design of two different integrated circuits realizedina0. 11μmtechnologyispresented,eachoneaddressingadifferentaspect. With respect to ef?ciency enhancement, the design of a dynamic supply RF power ampli?er is treated, making up the material of Chaps. 2 to 4.
Author: Fei Yuan Publisher: Springer Science & Business Media ISBN: 0387764798 Category : Technology & Engineering Languages : en Pages : 300
Book Description
Many new topologies and circuit design techniques have emerged recently to improve the performance of active inductors, but a comprehensive treatment of the theory, topology, characteristics, and design constraint of CMOS active inductors and transformers, and a detailed examination of their emerging applications in high-speed analog signal processing and data communications over wire and wireless channels, is not available. This book is an attempt to provide an in-depth examination and a systematic presentation of the operation principles and implementation details of CMOS active inductors and transformers, and a detailed examination of their emerging applications in high-speed analog signal processing and data communications over wire and wireless channels. The content of the book is drawn from recently published research papers and are not available in a single, cohesive book. Equal emphasis is given to the theory of CMOS active inductors and transformers, and their emerging applications. Major subjects to be covered in the book include: inductive characteristics in high-speed analog signal processing and data communications, spiral inductors and transformers – modeling and limitations, a historical perspective of device synthesis, the topology, characterization, and implementation of CMOS active inductors and transformers, and the application of CMOS active inductors and transformers in high-speed analog and digital signal processing and data communications.
Author: Ali M. Niknejad Publisher: Springer Science & Business Media ISBN: 0306470381 Category : Technology & Engineering Languages : en Pages : 193
Book Description
The modern wireless communication industry has put great demands on circuit designers for smaller, cheaper transceivers in the gigahertz frequency range. One tool which has assisted designers in satisfying these requirements is the use of on-chip inductiveelements (inductors and transformers) in silicon (Si) radio-frequency (RF) integrated circuits (ICs). These elements allow greatly improved levels of performance in Si monolithic low-noise amplifiers, power amplifiers, up-conversion and down-conversion mixers and local oscillators. Inductors can be used to improve the intermodulation distortion performance and noise figure of small-signal amplifiers and mixers. In addition, the gain of amplifier stages can be enhanced and the realization of low-cost on-chip local oscillators with good phase noise characteristics is made feasible. In order to reap these benefits, it is essential that the IC designer be able to predict and optimize the characteristics of on-chip inductiveelements. Accurate knowledge of inductance values, quality factor (Q) and the influence of ad- cent elements (on-chip proximity effects) and substrate losses is essential. In this book the analysis, modeling and application of on-chip inductive elements is considered. Using analyses based on Maxwells equations, an accurate and efficient technique is developed to model these elements over a wide frequency range. Energy loss to the conductive substrate is modeled through several mechanisms, including electrically induced displacement and conductive c- rents and by magnetically induced eddy currents. These techniques have been compiled in a user-friendly software tool ASITIC (Analysis and Simulation of Inductors and Transformers for Integrated Circuits).
Author: Jaime Aguilera Publisher: Springer Science & Business Media ISBN: 0306487055 Category : Technology & Engineering Languages : en Pages : 203
Book Description
Intended for engineers who are starting out in the design of integrated inductors, this book describes the whole design flow, basic selection of the geometry and optimisation of the quality by redesigning the geometry, measurement and de-embedding and characterisation.
Author: Sy-Min Chueng Publisher: ISBN: Category : Electric inductors Languages : en Pages : 64
Book Description
Active Inductors are useful in reducing the large chip area typically consumed by spiral inductors, as well as providing larger inductance values and higher quality factors that otherwise cannot be achieved by spiral inductors. Integrated inductors find application in many radio frequency (RF) front end integrated circuits, including impedance matching, filtering, biasing and in oscillator circuits. Nonetheless, because of the interdependent relationship of the self-resonant frequency and quality factor it is often difficult to meet desired circuit requirements. Additionally, active devices pose problems of higher power consumption, noise figure and potential instability. This thesis begins with the study of active inductors, the Wu active inductor in particular, and considers tuning methods based on the Wu active inductor topology. Starting with the small-signal model, the emulated inductance and quality factor expressions are derived. Next, the operation of active inductors under large-signal is closely examined. Comparisons between a passive and an active VCO are made. The active inductor based voltage-controlled oscillator (Active VCO) is studied extensively, and the methods of improving the performance under large signal-behavior are discussed. Then a design procedure based on gm/ID methodology is proposed. A Matlab script that can be applied to gyrator-C based active inductors is developed to determine the sizing of the transistors for a desired inductance and resonant frequency. Cadence Virtuoso is used for simulations, and extraction based on an IBM 8RF technology file. Finally, a low power active VCO is designed, simulated and laid out.
Author: Reinhold Frederick William Hollender (III.) Publisher: ISBN: Category : Metal oxide semiconductors, Complementary Languages : en Pages : 174
Book Description
Wireless communications play an increasingly large role in today's society. Today, many wireless functions are necessarily integrated into chips and other small packages to support miniaturized wireless devices such as cell phones, laptops, netbooks, etc. These Radio Frequency Integrated Circuits (RFICs) often require inductances to perform their function. Most RFICs utilize spiral inductors. Spiral inductors have their properties defined by their physical dimensions, often taking up large areas of IC real estate. There has been research into replacing these spiral inductors with active elements to reduce their size. However, these active inductors are based on parasitic elements that can vary significantly over temperature, supply voltage, and processing variations of the wafers themselves. This professional paper documents an improved control scheme to maintain correct active inductor behavior over process, voltage, and temperature variations in applications where the active inductor is used in a Wilkinson power divider.
Author: João L. C. P. Domingues Publisher: Springer Nature ISBN: 3031250990 Category : Computers Languages : en Pages : 115
Book Description
In this book, innovative research using artificial neural networks (ANNs) is conducted to automate the sizing task of RF IC design, which is used in two different steps of the automatic design process. The advances in telecommunications, such as the 5th generation broadband or 5G for short, open doors to advances in areas such as health care, education, resource management, transportation, agriculture and many other areas. Consequently, there is high pressure in today’s market for significant communication rates, extensive bandwidths and ultralow-power consumption. This is where radiofrequency (RF) integrated circuits (ICs) come in hand, playing a crucial role. This demand stresses out the problem which resides in the remarkable difficulty of RF IC design in deep nanometric integration technologies due to their high complexity and stringent performances. Given the economic pressure for high quality yet cheap electronics and challenging time-to-market constraints, there is an urgent need for electronic design automation (EDA) tools to increase the RF designers’ productivity and improve the quality of resulting ICs. In the last years, the automatic sizing of RF IC blocks in deep nanometer technologies has moved toward process, voltage and temperature (PVT)-inclusive optimizations to ensure their robustness. Each sizing solution is exhaustively simulated in a set of PVT corners, thus pushing modern workstations’ capabilities to their limits. Standard ANNs applications usually exploit the model’s capability of describing a complex, harder to describe, relation between input and target data. For that purpose, ANNs are a mechanism to bypass the process of describing the complex underlying relations between data by feeding it a significant number of previously acquired input/output data pairs that the model attempts to copy. Here, and firstly, the ANNs disrupt from the most recent trials of replacing the simulator in the simulation-based sizing with a machine/deep learning model, by proposing two different ANNs, the first classifies the convergence of the circuit for nominal and PVT corners, and the second predicts the oscillating frequencies for each case. The convergence classifier (CCANN) and frequency guess predictor (FGPANN) are seamlessly integrated into the simulation-based sizing loop, accelerating the overall optimization process. Secondly, a PVT regressor that inputs the circuit’s sizing and the nominal performances to estimate the PVT corner performances via multiple parallel artificial neural networks is proposed. Two control phases prevent the optimization process from being misled by inaccurate performance estimates. As such, this book details the optimal description of the input/output data relation that should be fulfilled. The developed description is mainly reflected in two of the system’s characteristics, the shape of the input data and its incorporation in the sizing optimization loop. An optimal description of these components should be such that the model should produce output data that fulfills the desired relation for the given training data once fully trained. Additionally, the model should be capable of efficiently generalizing the acquired knowledge in newer examples, i.e., never-seen input circuit topologies.
Author: Yehea I. Ismail Publisher: Springer Science & Business Media ISBN: 1461516854 Category : Technology & Engineering Languages : en Pages : 310
Book Description
The appropriate interconnect model has changed several times over the past two decades due to the application of aggressive technology scaling. New, more accurate interconnect models are required to manage the changing physical characteristics of integrated circuits. Currently, RC models are used to analyze high resistance nets while capacitive models are used for less resistive interconnect. However, on-chip inductance is becoming more important with integrated circuits operating at higher frequencies, since the inductive impedance is proportional to the frequency. The operating frequencies of integrated circuits have increased dramatically over the past decade and are expected to maintain the same rate of increase over the next decade, approaching 10 GHz by the year 2012. Also, wide wires are frequently encountered in important global nets, such as clock distribution networks and in upper metal layers, and performance requirements are pushing the introduction of new materials for low resistance interconnect, such as copper interconnect already used in many commercial CMOS technologies. On-Chip Inductance in High Speed Integrated Circuits deals with the design and analysis of integrated circuits with a specific focus on on-chip inductance effects. It has been described throughout this book that inductance can have a tangible effect on current high speed integrated circuits. For example, neglecting inductance and using an RC interconnect model in a production 0.25 mum CMOS technology can cause large errors (over 35%) in estimates of the propagation delay of on-chip interconnect. It has also been shown that including inductance in the repeater insertion design process as compared to using an RC model improves the overall repeater solution in terms of area, power, and delay with average savings of 40.8%, 15.6%, and 6.7%, respectively. On-Chip Inductance in High Speed Integrated Circuits is full of design and analysis techniques for RLC interconnect. These techniques are compared to techniques traditionally used for RC interconnect design to emphasize the effect of inductance. emOn-Chip Inductance in High Speed Integrated Circuits will be of interest to researchers in the area of high frequency interconnect, noise, and high performance integrated circuit design.
Author: Kyle Joshua Lyson
Author: Kyle Joshua Lyson
Author: Paulo Augusto Dal Fabbro
Author: Fei Yuan
Author: Ali M. Niknejad
Author: Jaime Aguilera
Author: Sy-Min Chueng
Author: Reinhold Frederick William Hollender (III.)
Author: João L. C. P. Domingues
Author: Yehea I. Ismail
Author: