Author: Rosemary P. BeattyPublisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 34
Book Description
Metallization Systems for Integrated Circuits
Author: Rosemary P. BeattyPublisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 34
Book Description
Handbook of Multilevel Metallization for Integrated Circuits
Author: Syd R. WilsonPublisher: William Andrew
ISBN:
Category : Technology & Engineering
Languages : en
Pages : 922
Book Description
It is widely recognized that the successful design, development, and integration of multilevel metallization (MLM) systems is and will continue to be key to current and future VLSI technologies. All major semiconductor companies have significant ongoing research teams focused in this area. These teams must view multilevel metallization as a system rather than a collection of isolated process modules.
NASA Technical Note
Author: VLSI Metallization
Author: Norman G. EinspruchPublisher: Academic Press
ISBN: 1483217817
Category : Technology & Engineering
Languages : en
Pages : 491
Book Description
VLSI Electronics Microstructure Science, Volume 15: VLSI Metallization discusses the various issues and problems related to VLSI metallization. It details the available solutions and presents emerging trends. This volume is comprised of 10 chapters. The two introductory chapters, Chapter 1 and 2 serve as general references for the electrical and metallurgical properties of thin conducting films. Subsequent chapters review the various aspects of VLSI metallization. The order of presentation has been chosen to follow the common processing sequence. In Chapter 3, some relevant metal deposition techniques are discussed. Chapter 4 presents the methods of VLSI lithography and etching. Conducting films are first deposited at the gate definition step; therefore, the issues related to gate metallization are discussed next in Chapter 5.In Chapter 6, contact metallization is elaborated, and Chapter 7 is devoted to multilevel metallization schemes. Long-time reliability is the subject of Chapter 8, which discusses the issues of contact and interconnect electromigration. GaAs metallization is tackled in Chapter 9. The volume concludes with a general discussion of the functions of interconnect systems in VLSI. Materials scientists, processing and design engineers, and device physicists will find the book very useful.
Device Electronics for Integrated Circuits
Author: Richard S. MullerPublisher: John Wiley & Sons
ISBN: 0471593982
Category : Technology & Engineering
Languages : en
Pages : 564
Book Description
Focusing specifically on silicon devices, the Third Edition of Device Electronics for Integrated Circuits takes students in integrated-circuits courses from fundamental physics to detailed device operation. Because the book focuses primarily on silicon devices, each topic can include more depth, and extensive worked examples and practice problems ensure that students understand the details.
Reliability Abstracts and Technical Reviews
Author: United States. National Aeronautics and Space Administration. Office of Reliability and Quality AssurancePublisher:
ISBN:
Category : Quality control
Languages : en
Pages : 610
Book Description
Reliability of Compound Analogue Semiconductor Integrated Circuits
Author: Aris ChristouPublisher: RIAC
ISBN: 1933904194
Category :
Languages : en
Pages : 487
Book Description
Monthly Catalogue, United States Public Documents
Author: Publisher:
ISBN:
Category : Government publications
Languages : en
Pages : 1730
Book Description
A One-Semester Course in Modeling of VSLI Interconnections
Author: Ashok GoelPublisher: Momentum Press
ISBN: 1606505130
Category : Technology & Engineering
Languages : en
Pages : 394
Book Description
Quantitative understanding of the parasitic capacitances and inductances, and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. More than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. A One-Semester Course in Modeling of VLSI Interconnections also includes an overview of the future interconnection technologies for the nanotechnology circuits.
Author: