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Author: Institute of Electrical and Electronics Engineers Publisher: Conference ISBN: Category : Automatic checkout equipment Languages : en Pages : 1032
Book Description
Annotation The proceedings of the 23rd edition of the premier technical conference on electronic testing, held in Baltimore, Maryland, September 1992, comprise papers, panels, and tutorials in the areas of design and test integration; test management; software; test hardware; device, assembly, and system test; and IEEE test standards. ITC's 1992 theme, Discover the New World of Test and Design, reflects the growing emphasis on tighter integration of test and design to assure the highest quality products. No subject index. Ruggedly bound for heavy use. Annotation copyrighted by Book News, Inc., Portland, OR.
Author: Institute of Electrical and Electronics Engineers Publisher: Conference ISBN: Category : Automatic checkout equipment Languages : en Pages : 1032
Book Description
Annotation The proceedings of the 23rd edition of the premier technical conference on electronic testing, held in Baltimore, Maryland, September 1992, comprise papers, panels, and tutorials in the areas of design and test integration; test management; software; test hardware; device, assembly, and system test; and IEEE test standards. ITC's 1992 theme, Discover the New World of Test and Design, reflects the growing emphasis on tighter integration of test and design to assure the highest quality products. No subject index. Ruggedly bound for heavy use. Annotation copyrighted by Book News, Inc., Portland, OR.
Author: S. Chakravarty Publisher: Springer Science & Business Media ISBN: 146156137X Category : Technology & Engineering Languages : en Pages : 336
Book Description
Testing techniques for VLSI circuits are undergoing many exciting changes. The predominant method for testing digital circuits consists of applying a set of input stimuli to the IC and monitoring the logic levels at primary outputs. If, for one or more inputs, there is a discrepancy between the observed output and the expected output then the IC is declared to be defective. A new approach to testing digital circuits, which has come to be known as IDDQ testing, has been actively researched for the last fifteen years. In IDDQ testing, the steady state supply current, rather than the logic levels at the primary outputs, is monitored. Years of research suggests that IDDQ testing can significantly improve the quality and reliability of fabricated circuits. This has prompted many semiconductor manufacturers to adopt this testing technique, among them Philips Semiconductors, Ford Microelectronics, Intel, Texas Instruments, LSI Logic, Hewlett-Packard, SUN microsystems, Alcatel, and SGS Thomson. This increase in the use of IDDQ testing should be of interest to three groups of individuals associated with the IC business: Product Managers and Test Engineers, CAD Tool Vendors and Circuit Designers. Introduction to IDDQ Testing is designed to educate this community. The authors have summarized in one volume the main findings of more than fifteen years of research in this area.
Author: Flaviu Cristian Publisher: Springer Science & Business Media ISBN: 3709193966 Category : Computers Languages : en Pages : 479
Book Description
This volume contains the articles presented at the Fourth InternationallFIP Working Conference on Dependable Computing for Critical Applications held in San Diego, California, on January 4-6, 1994. In keeping with the previous three conferences held in August 1989 at Santa Barbara (USA), in February 1991 at Tucson (USA), and in September 1992 at Mondello (Italy), the conference was concerned with an important basic question: can we rely on computer systems for critical applications? This conference, like its predecessors, addressed various aspects of dependability, a broad term defined as the degree of trust that may justifiably be placed in a system's reliability, availability, safety, security and performance. Because of its broad scope, a main goal was to contribute to a unified understanding and integration of these concepts. The Program Committee selected 21 papers for presentation from a total of 95 submissions at a September meeting in Menlo Park, California. The resulting program represents a broad spectrum of interests, with papers from universities, corporations and government agencies in eight countries. The selection process was greatly facilitated by the diligent work of the program committee members, for which we are most grateful. As a Working Conference, the program was designed to promote the exchange of ideas by extensive discussions. All paper sessions ended with a 30 minute discussion period on the topics covered by the session. In addition, three panel sessions have been organizcd.
Author: Kenneth P. Parker Publisher: Springer Science & Business Media ISBN: 1475721420 Category : Computers Languages : en Pages : 273
Book Description
Boundary-Scan, formally known as IEEE/ANSI Standard 1149.1-1990, is a collection of design rules applied principally at the integrated circuit (IC) level that allow software to alleviate the growing cost of designing and producing digital systems. The primary benefit of the standard is its ability to transform extremely printed circuit board testing problems that could only be attacked with ad-hoc testing methods into well-structured problems that software can easily and swiftly deal with. The Boundary-Scan Handbook is for professionals in the electronics industry who are concerned with the practical problems of competing successfully in the face of rapid-fire technological change. Since many of these changes affect our ability to do testing and hence cost-effective production, the advent of the 1149.1 standard is rightly looked upon as a major breakthrough. However, there is a great deal of misunderstanding about what to expect of 1149.1 and how to use it. Because of this, The Boundary-Scan Handbook is not a rehash of the 1149.1 standard, nor does it intend to be a tutorial on the basics of its workings. The standard itself should always be consulted for this, being careful to follow supplements issued by the IEEE that clarify and correct it. Rather, The Boundary-Scan Handbook motivates proper expectations and explains how to use the standard successfully.
Book Description
"INTEGRATED CIRCUIT MANUFACTURABILITY provides comprehensive coverage of the process and design variables that determine the ease and feasibility of fabrication (or manufacturability) of contemporary VLSI systems and circuits. This book progresses from semiconductor processing to electrical design to system architecture. The material provides a theoretical background as well as case studies, examining the entire design for the manufacturing path from circuit to silicon. Each chapter includes tutorial and practical applications coverage. INTEGRATED CIRCUIT MANUFACTURABILITY illustrates the implications of manufacturability at every level of abstraction, including the effects of defects on the layout, their mapping to electrical faults, and the corresponding approaches to detect such faults. The reader will be introduced to key practical issues normally applied in industry and usually required by quality, product, and design engineering departments in today's design practices: * Yield management strategies * Effects of spot defects * Inductive fault analysis and testing * Fault-tolerant architectures and MCM testing strategies. This book will serve design and product engineers both from academia and industry. It can also be used as a reference or textbook for introductory graduate-level courses on manufacturing."
Author: Sandeep K. Goel Publisher: CRC Press ISBN: 143982942X Category : Technology & Engineering Languages : en Pages : 259
Book Description
Advances in design methods and process technologies have resulted in a continuous increase in the complexity of integrated circuits (ICs). However, the increased complexity and nanometer-size features of modern ICs make them susceptible to manufacturing defects, as well as performance and quality issues. Testing for Small-Delay Defects in Nanoscale CMOS Integrated Circuits covers common problems in areas such as process variations, power supply noise, crosstalk, resistive opens/bridges, and design-for-manufacturing (DfM)-related rule violations. The book also addresses testing for small-delay defects (SDDs), which can cause immediate timing failures on both critical and non-critical paths in the circuit. Overviews semiconductor industry test challenges and the need for SDD testing, including basic concepts and introductory material Describes algorithmic solutions incorporated in commercial tools from Mentor Graphics Reviews SDD testing based on "alternative methods" that explores new metrics, top-off ATPG, and circuit topology-based solutions Highlights the advantages and disadvantages of a diverse set of metrics, and identifies scope for improvement Written from the triple viewpoint of university researchers, EDA tool developers, and chip designers and tool users, this book is the first of its kind to address all aspects of SDD testing from such a diverse perspective. The book is designed as a one-stop reference for current industrial practices, research challenges in the domain of SDD testing, and recent developments in SDD solutions.
Author: Manoj Sachdev Publisher: Springer Science & Business Media ISBN: 0387465472 Category : Technology & Engineering Languages : en Pages : 343
Book Description
The 2nd edition of defect oriented testing has been extensively updated. New chapters on Functional, Parametric Defect Models and Inductive fault Analysis and Yield Engineering have been added to provide a link between defect sources and yield. The chapter on RAM testing has been updated with focus on parametric and SRAM stability testing. Similarly, newer material has been incorporated in digital fault modeling and analog testing chapters. The strength of Defect Oriented Testing for nano-Metric CMOS VLSIs lies in its industrial relevance.
Author: Manoj Sachdev Publisher: Springer Science & Business Media ISBN: 1475749260 Category : Technology & Engineering Languages : en Pages : 317
Book Description
Defect oriented testing is expected to play a significant role in coming generations of technology. Smaller feature sizes and larger die sizes will make ICs more sensitive to defects that can not be modeled by traditional fault modeling approaches. Furthermore, with increased level of integration, an IC may contain diverse building blocks. Such blocks include, digital logic, PLAs, volatile and non-volatile memories, and analog interfaces. For such diverse building blocks, traditional fault modeling and test approaches will become increasingly inadequate. Defect oriented testing methods have come a long way from a mere interesting academic exercise to a hard industrial reality. Many factors have contributed to its industrial acceptance. Traditional approaches of testing modern integrated circuits (ICs) have been found to be inadequate in terms of quality and economics of test. In a globally competitive semiconductor market place, overall product quality and economics have become very important objectives. In addition, electronic systems are becoming increasingly complex and demand components of highest possible quality. Testing, in general and, defect oriented testing, in particular, help in realizing these objectives. Defect Oriented Testing for CMOS Analog and Digital Circuits is the first book to provide a complete overview of the subject. It is essential reading for all design and test professionals as well as researchers and students working in the field. `A strength of this book is its breadth. Types of designs considered include analog and digital circuits, programmable logic arrays, and memories. Having a fault model does not automatically provide a test. Sometimes, design for testability hardware is necessary. Many design for testability ideas, supported by experimental evidence, are included.' ... from the Foreword by Vishwani D. Agrawal
Author: Samiha Mourad Publisher: John Wiley & Sons ISBN: 9780471319313 Category : Technology & Engineering Languages : en Pages : 444
Book Description
A pragmatic approach to testing electronic systems As we move ahead in the electronic age, rapid changes in technology pose an ever-increasing number of challenges in testing electronic products. Many practicing engineers are involved in this arena, but few have a chance to study the field in a systematic way-learning takes place on the job. By covering the fundamental disciplines in detail, Principles of Testing Electronic Systems provides design engineers with the much-needed knowledge base. Divided into five major parts, this highly useful reference relates design and tests to the development of reliable electronic products; shows the main vehicles for design verification; examines designs that facilitate testing; and investigates how testing is applied to random logic, memories, FPGAs, and microprocessors. Finally, the last part offers coverage of advanced test solutions for today's very deep submicron designs. The authors take a phenomenological approach to the subject matter while providing readers with plenty of opportunities to explore the foundation in detail. Special features include: * An explanation of where a test belongs in the design flow * Detailed discussion of scan-path and ordering of scan-chains * BIST solutions for embedded logic and memory blocks * Test methodologies for FPGAs * A chapter on testing system on a chip * Numerous references
Author: A. Biere Publisher: IOS Press ISBN: 1643681613 Category : Computers Languages : en Pages : 1486
Book Description
Propositional logic has been recognized throughout the centuries as one of the cornerstones of reasoning in philosophy and mathematics. Over time, its formalization into Boolean algebra was accompanied by the recognition that a wide range of combinatorial problems can be expressed as propositional satisfiability (SAT) problems. Because of this dual role, SAT developed into a mature, multi-faceted scientific discipline, and from the earliest days of computing a search was underway to discover how to solve SAT problems in an automated fashion. This book, the Handbook of Satisfiability, is the second, updated and revised edition of the book first published in 2009 under the same name. The handbook aims to capture the full breadth and depth of SAT and to bring together significant progress and advances in automated solving. Topics covered span practical and theoretical research on SAT and its applications and include search algorithms, heuristics, analysis of algorithms, hard instances, randomized formulae, problem encodings, industrial applications, solvers, simplifiers, tools, case studies and empirical results. SAT is interpreted in a broad sense, so as well as propositional satisfiability, there are chapters covering the domain of quantified Boolean formulae (QBF), constraints programming techniques (CSP) for word-level problems and their propositional encoding, and satisfiability modulo theories (SMT). An extensive bibliography completes each chapter. This second edition of the handbook will be of interest to researchers, graduate students, final-year undergraduates, and practitioners using or contributing to SAT, and will provide both an inspiration and a rich resource for their work. Edmund Clarke, 2007 ACM Turing Award Recipient: "SAT solving is a key technology for 21st century computer science." Donald Knuth, 1974 ACM Turing Award Recipient: "SAT is evidently a killer app, because it is key to the solution of so many other problems." Stephen Cook, 1982 ACM Turing Award Recipient: "The SAT problem is at the core of arguably the most fundamental question in computer science: What makes a problem hard?"
Author: Institute of Electrical and Electronics Engineers
Author: Institute of Electrical and Electronics Engineers
Author: S. Chakravarty
Author: Flaviu Cristian
Author: Kenneth P. Parker
Author: José Pineda de Gyvez
Author: Sandeep K. Goel
Author: Manoj Sachdev
Author: Manoj Sachdev
Author: Samiha Mourad
Author: A. Biere