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Author: Caroline W. Waiyaki Publisher: ISBN: Category : Digital communications Languages : en Pages : 342
Book Description
Current communication systems at Ka-band are using traveling wave tube amplifiers (TWTAs) that are bulky, costly and require high-voltage power supplies. Advances on solid state device technologies with benefits such as low supply voltage, graceful degradation, lower development cost, and high power densities have made solid state power amplifiers (SSPAs) very attractive as TWTA replacements. These attributes are beneficial to the military's need for reducing size, weight, and prime power (SWAP) and cost of the existing electronic components. The Gallium Arsenide (GaAs) device technology has been the workhorse of the solid state power amplifiers (SSPAs) for the last two decades and has demonstrated maturity at the Ka-band frequencies. Gallium Nitride (GaN), though less mature, is increasingly becoming the technology of choice for high frequency, high power applications due to its desirable attributes (i.e. high breakdown fields, high power density, and high electron saturation velocity). The SSPA modules currently available at Ka-band are based on GaAs device technology and utilize very low power (2W) and less efficient (20% power added efficiency (PAE)) monolithic microwave integrated circuits (MMICs). There is a need to improve the power and efficiency of current MMICs by incorporating on-chip planar power combining. This research focuses on the design of a highly efficient multi-watt SSPA chip at Ka-band for space, defense and commercial wireless communications applications. GaAs- and GaN- based device technologies are utilized in this research to demonstrate the feasibility of achieving multi-watt PAs with 40% PAE at Ka-band. Class AB biasing has been chosen for the design to obtain a good compromise between linearity and efficiency performances. Additionally, a novel planar power combining network that incorporates harmonic suppression, Wei-Chi, is implemented in the chip design to improve on the power and efficiency performance without degrading linearity performance. This Wei-Chi combiner performance is also compared to the Wilkinson combiner, which is commonly used in MMIC design. S-band GaN-based microwave integrated circuits (MICs) using Cree's 10W GaN HEMT packaged devices were designed to verify the feasibility of the approach. The MMIC designs for this work included a GaAs-based chip using Triquint's 0.13&mgr;m pHEMT process and a GaN-based chip on Triquint's 0.15&mgr;m GaN on SiC HEMT process. Both designs implemented the Wei-Chi combiner at Ka-band. The GaAs MMIC design has demonstrated measured output power of 22 dBm and 39.32 % PAE at 26.5 GHz. In addition, the simulated results for the GaN MMIC design are presented in this research. The GaN MMIC is expected to deliver 2W output power with 40% PAE. -- Abstract.
Author: Caroline W. Waiyaki Publisher: ISBN: Category : Digital communications Languages : en Pages : 342
Book Description
Current communication systems at Ka-band are using traveling wave tube amplifiers (TWTAs) that are bulky, costly and require high-voltage power supplies. Advances on solid state device technologies with benefits such as low supply voltage, graceful degradation, lower development cost, and high power densities have made solid state power amplifiers (SSPAs) very attractive as TWTA replacements. These attributes are beneficial to the military's need for reducing size, weight, and prime power (SWAP) and cost of the existing electronic components. The Gallium Arsenide (GaAs) device technology has been the workhorse of the solid state power amplifiers (SSPAs) for the last two decades and has demonstrated maturity at the Ka-band frequencies. Gallium Nitride (GaN), though less mature, is increasingly becoming the technology of choice for high frequency, high power applications due to its desirable attributes (i.e. high breakdown fields, high power density, and high electron saturation velocity). The SSPA modules currently available at Ka-band are based on GaAs device technology and utilize very low power (2W) and less efficient (20% power added efficiency (PAE)) monolithic microwave integrated circuits (MMICs). There is a need to improve the power and efficiency of current MMICs by incorporating on-chip planar power combining. This research focuses on the design of a highly efficient multi-watt SSPA chip at Ka-band for space, defense and commercial wireless communications applications. GaAs- and GaN- based device technologies are utilized in this research to demonstrate the feasibility of achieving multi-watt PAs with 40% PAE at Ka-band. Class AB biasing has been chosen for the design to obtain a good compromise between linearity and efficiency performances. Additionally, a novel planar power combining network that incorporates harmonic suppression, Wei-Chi, is implemented in the chip design to improve on the power and efficiency performance without degrading linearity performance. This Wei-Chi combiner performance is also compared to the Wilkinson combiner, which is commonly used in MMIC design. S-band GaN-based microwave integrated circuits (MICs) using Cree's 10W GaN HEMT packaged devices were designed to verify the feasibility of the approach. The MMIC designs for this work included a GaAs-based chip using Triquint's 0.13&mgr;m pHEMT process and a GaN-based chip on Triquint's 0.15&mgr;m GaN on SiC HEMT process. Both designs implemented the Wei-Chi combiner at Ka-band. The GaAs MMIC design has demonstrated measured output power of 22 dBm and 39.32 % PAE at 26.5 GHz. In addition, the simulated results for the GaN MMIC design are presented in this research. The GaN MMIC is expected to deliver 2W output power with 40% PAE. -- Abstract.
Author: Paolo Colantonio Publisher: John Wiley & Sons ISBN: 9780470746554 Category : Technology & Engineering Languages : en Pages : 514
Book Description
Do you want to know how to design high efficiency RF and microwave solid state power amplifiers? Read this book to learn the main concepts that are fundamental for optimum amplifier design. Practical design techniques are set out, stating the pros and cons for each method presented in this text. In addition to novel theoretical discussion and workable guidelines, you will find helpful running examples and case studies that demonstrate the key issues involved in power amplifier (PA) design flow. Highlights include: Clarification of topics which are often misunderstood and misused, such as bias classes and PA nomenclatures. The consideration of both hybrid and monolithic microwave integrated circuits (MMICs). Discussions of switch-mode and current-mode PA design approaches and an explanation of the differences. Coverage of the linearity issue in PA design at circuit level, with advice on low distortion power stages. Analysis of the hot topic of Doherty amplifier design, plus a description of advanced techniques based on multi-way and multi-stage architecture solutions. High Efficiency RF and Microwave Solid State Power Amplifiers is: an ideal tutorial for MSc and postgraduate students taking courses in microwave electronics and solid state circuit/device design; a useful reference text for practising electronic engineers and researchers in the field of PA design and microwave and RF engineering. With its unique unified vision of solid state amplifiers, you won’t find a more comprehensive publication on the topic.
Author: Dixian Zhao Publisher: Springer ISBN: 3319188399 Category : Technology & Engineering Languages : en Pages : 188
Book Description
This book focuses on the development of design techniques and methodologies for 60-GHz and E-band power amplifiers and transmitters at device, circuit and layout levels. The authors show the recent development of millimeter-wave design techniques, especially of power amplifiers and transmitters, and presents novel design concepts, such as “power transistor layout” and “4-way parallel-series power combiner”, that can enhance the output power and efficiency of power amplifiers in a compact silicon area. Five state-of-the-art 60-GHz and E-band designs with measured results are demonstrated to prove the effectiveness of the design concepts and hands-on methodologies presented. This book serves as a valuable reference for circuit designers to develop millimeter-wave building blocks for future 5G applications.
Author: Payam Masoumi Farahabadi Publisher: ISBN: Category : Power amplifiers Languages : en Pages : 164
Book Description
The availability of an unlicensed 7 GHz bandwidth around 60 GHz offers great potential for establishment of high-data-rate short-range wireless communication links. Although previously left unutilized, recent advances in electronics enable the development of wireless transceivers at millimeter-wave frequencies. Despite offering a large bandwidth, the high signal attenuation caused by oxygen absorption in 60 GHz band requires the wireless transmitters to transmit signals with power as large as 27 dBm, so the receivers can detect greatly attenuated signals. Therefore, the design of power amplifiers capable of generating such large output powers proves to be a major challenge in the development of 60 GHz wireless transceivers, especially if CMOS technology is chosen for implementation of fully integrated 60 GHz wireless systems. In this dissertation, we present new architectures for power combining transformers, as well as new circuit topologies to improve the performance of 60 GHz power amplifiers implemented in CMOS technology. Although CMOS offers a higher level of integration and lower fabrication cost compared to high-speed compound semiconductor technologies, low supply and breakdown voltages, as well as operation near cutoff frequencies of MOSFETs make the design of power amplifier extremely challenging. Optimization of the efficiency/power performance of CMOS power amplifiers operating at millimeter-wave frequencies requires novelty in the design of active/passive structures. An overview on the technological advances and the challenges in millimeter-wave CMOS power amplifiers is presented by comparing previously reported active/passive power combination techniques. A comprehensive analysis and modeling of the matching circuits and on-chip spiral transformers are developed in order to estimate the passive power efficiency of the coupling circuits and power combining transformers. A new area-efficient power-combining configuration is proposed to achieve a high output power per occupied area. A 60 GHz power amplifier is fabricated utilizing the new combining technique with a measured output power of 18.8 dBm. Second we propose a new circuit topology to enable the capability of dual-mode operation. Also, a new enhancement technique is utilized in order to improve the gain-bandwidth product of cascode gain stages. Fabricated in 65 nm technology, the 60 GHz power amplifier could achieve measured maximum power added efficiency of 17.2% while delivering 18.1 dBm output power. Finally, we explore the utilization of a new dual-mode technique in a distributed active transformer power amplifier. A new power amplifier circuit topology and a new DAT layout technique is proposed in order to improve the power added efficiency and output power simultaneously. Fabricated in 65nm CMOS technology, the maximum measured gain of the 60 GHz power amplifier is 22 dB within a wide 3dB bandwidth of 14 GHz. A maximum saturated output power of 19.7 dBm is measured in high-power mode while a high power added efficiency of 25% is achieved.
Author: Jaco du Preez Publisher: Springer ISBN: 3319621661 Category : Technology & Engineering Languages : en Pages : 367
Book Description
This book provides a detailed review of millimeter-wave power amplifiers, discussing design issues and performance limitations commonly encountered in light of the latest research. Power amplifiers, which are able to provide high levels of output power and linearity while being easily integrated with surrounding circuitry, are a crucial component in wireless microwave systems. The book is divided into three parts, the first of which introduces readers to mm-wave wireless systems and power amplifiers. In turn, the second focuses on design principles and EDA concepts, while the third discusses future trends in power amplifier research. The book provides essential information on mm-wave power amplifier theory, as well as the implementation options and technologies involved in their effective design, equipping researchers, circuit designers and practicing engineers to design, model, analyze, test and implement high-performance, spectrally clean and energy-efficient mm-wave systems.
Author: Eric Kerhervé Publisher: Elsevier ISBN: 0124186815 Category : Technology & Engineering Languages : en Pages : 163
Book Description
This book provides an overview of current efficiency enhancement and linearization techniques for silicon power amplifier designs. It examines the latest state of the art technologies and design techniques to address challenges for RF cellular mobile, base stations, and RF and mmW WLAN applications. Coverage includes material on current silicon (CMOS, SiGe) RF and mmW power amplifier designs, focusing on advantages and disadvantages compared with traditional GaAs implementations. With this book you will learn: The principles of linearization and efficiency improvement techniques The architectures allowing the optimum design of multimode Si RF and mmW power amplifiers How to make designs more efficient by employing new design techniques such as linearization and efficiency improvement Layout considerations Examples of schematic, layout, simulation and measurement results Addresses the problems of high power generation, faithful construction of non-constant envelope constellations, and efficient and well control power radiation from integrated silicon chips Demonstrates how silicon technology can solve problems and trade-offs of power amplifier design, including price, size, complexity and efficiency Written and edited by the top contributors to the field
Author: David Flynn Publisher: Springer Science & Business Media ISBN: 0387718192 Category : Technology & Engineering Languages : en Pages : 303
Book Description
This book provides a practical guide for engineers doing low power System-on-Chip (SoC) designs. It covers various aspects of low power design from architectural issues and design techniques to circuit design of power gating switches. In addition to providing a theoretical basis for these techniques, the book addresses the practical issues of implementing them in today's designs with today's tools.
Author: Roshanak Lehna Publisher: kassel university press GmbH ISBN: 373760388X Category : Languages : en Pages : 190
Book Description
The modern wireless communication systems require modulated signals with wide modulation bandwidth. This, in turns, requires signals with very high dynamic range and peak-to-average power ratio (PAPR). This means that the amplifier in the base-station has to work at a power back-off as large as the dynamic range of the signal, so that the amplifier has a high linearity in this region. For the standard single-stage amplifiers, this large power back-off reduces the efficiency dramatically. In this work, a three-way Doherty power amplifier (DPA) aiming at high power efficiency within a dynamic range of 9.5 dB, is designed and fabricated using partitioning design approach. The partitioning design approach decomposes a complex design task into small-sized, well-controllable, and verifiable subcircuits. This advanced straight forward method has shown very promising results. Using this design approach, a three-way DPA has been designed to demonstrate the advantages of this reliable design technique as well. Based on the design of a single-stage power amplifier and proposing a novel output power combiner, a 6 W three-way DPA has been designed which allows the mandatory load modulation principle in three-way DPA structures to be realized with simpler elements, whereas the design of a standard Doherty combiner would have been very challenging and not practical due to the extremely small value of its characteristic line impedance. The proposed combiner is calculated for a three-way DPA with 2-mm AlGaN/GaN-HEMTs. The simulation result shows a very good load modulation for the amplifier, which confirms the theoretical expectation for a three-way DPA. The efficiency of the designed 6 W three-way DPA at large back-off shows very promising values compared to recently reported amplifiers. The measured IMD3 products confirm the good linearity of the amplifier as well. Accordingly, the proposed power combiner and the design strategy are recommended to be used as the preferred option for designing three-way DPA structures with very high output power.
Author: Alexander Nicholas Stameroff Publisher: ISBN: 9781303154720 Category : Languages : en Pages :
Book Description
In this PhD. research, a new power amplifier architecture is introduced. This work develops the push-pull architecture into a multifunctional matching network and combiner to create a high power, high efficiency, linear power amplifier (PA) that operates over a wide bandwidth. The traditional push-pull architecture uses an input balun to split a single ended signal into a differential signal, amplify it, and recombine it. This new technique realizes this architecture as a planar, hybrid, PA in X band. The first contribution of this work is the development of planar Marchand baluns that operate over a wide bandwidth. An analysis technique is developed and broadside coupled, Marchand baluns in an inhomogeneous medium are employed. These baluns operate over a bandwidth from 5 to 26 GHz with amplitude and phase imbalances less than 0.5 dB and 5°, respectively. The even and odd mode behavior of the Marchand balun is utilized to provide harmonic matching for the PA. The balun inherently presents an open circuit to common mode signals at its center frequency. This is utilized to match the second harmonic to an open circuit condition. A band-stop filter is used as a harmonic trap to match the third harmonic to a short circuit. This achieves inverse class F matching for high efficiency operation. This network simultaneously acts as a combiner and matching network for high power and efficiency. A prototype PA was fabricated to prove this concept and achieves a saturated output power, Psat, greater than 33 dBm and a power added efficiency, PAE, greater than 62% over the bandwidth from 9.7 to 10.3 GHz.This technique was refined to operate over a wide bandwidth. The harmonic trap was removed and the out-of-band behavior of the balun was used to provide the short circuit matching at the third harmonic. A prototype PA was fabricated that achieved a 1 dB compressed power, P1dB, and PAE greater than 40 dBm and 55% respectively over the band from 8 to 12 GHz. Finally, the technique was extended to combine power from four transistors by the development of a 4-to-1 balun. A prototype PA was fabricated to prove this concept and achieves a P1dB and PAE greater than 43 dBm and 55% over the band from 8 to 12 GHz.
Author: National Aeronautics and Space Administration (NASA) Publisher: Createspace Independent Publishing Platform ISBN: 9781721816668 Category : Languages : en Pages : 36
Book Description
Motivated by recent advances in wide-bandgap (WBG) gallium nitride (GaN) semiconductor technology, there is considerable interest in developing efficient solid-state power amplifiers (SSPAs) as an alternative to the traveling-wave tube amplifier (TWTA) for space applications. This article documents proof-of-concept hardware used to validate power-combining technologies that may enable a 120-W, 40 percent power-added efficiency (PAE) SSPA. Results in previous articles [1-3] indicate that architectures based on at least three power combiner designs are likely to enable the target SSPA. Previous architecture performance analyses and estimates indicate that the proposed architectures can power combine 16 to 32 individual monolithic microwave integrated circuits (MMICs) with >80 percent combining efficiency. This combining efficiency would correspond to MMIC requirements of 5- to 10-W output power and >48 percent PAE. In order to validate the performance estimates of the three proposed architectures, measurements of proof-of-concept hardware are reported here. Epp, L. and Khan, P. and Silva, A. Glenn Research Center; Jet Propulsion Laboratory IPN-PR-42-163
Author: Caroline W. Waiyaki
Author: Caroline W. Waiyaki
Author: Paolo Colantonio
Author: Dixian Zhao
Author: Payam Masoumi Farahabadi
Author: Jaco du Preez
Author: Eric Kerhervé
Author: David Flynn
Author: Roshanak Lehna
Author: Alexander Nicholas Stameroff
Author: National Aeronautics and Space Administration (NASA)