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Author: Riley D. Beck Publisher: ISBN: Category : Analog electronic systems Languages : en Pages : 64
Book Description
This thesis introduces high-voltage approaches that are implemented in an analog Hall-effect sensor interface. This interface has been realized in a modified 5V 0.6um CMOS process using 40V high-voltage MOS transistors that do not affect low-voltage device functionality. These circuits include a high-voltage, low-offset current sense amplifier, which achieves a common-mode input range that is within a Vtp of Vdd using a bulk-driven differential input stage. The amplifier also uses high voltage cascode devices to protect low-voltage devices that have been placed in critical matching areas to achieve a low input offset voltage of 500uV without the use of trim. A short to battery architecture is also discussed which uses a bulk-driven comparator and a PMOS blocking technique and allows for a reliable short to battery breakdown voltage without using a series blocking diode. Integration of these blocks into a standard CMOS process leads to cost savings as additional devices such as data converters and microprocessors are combined with the Hall-effect sensor interface.
Author: Riley D. Beck Publisher: ISBN: Category : Analog electronic systems Languages : en Pages : 64
Book Description
This thesis introduces high-voltage approaches that are implemented in an analog Hall-effect sensor interface. This interface has been realized in a modified 5V 0.6um CMOS process using 40V high-voltage MOS transistors that do not affect low-voltage device functionality. These circuits include a high-voltage, low-offset current sense amplifier, which achieves a common-mode input range that is within a Vtp of Vdd using a bulk-driven differential input stage. The amplifier also uses high voltage cascode devices to protect low-voltage devices that have been placed in critical matching areas to achieve a low input offset voltage of 500uV without the use of trim. A short to battery architecture is also discussed which uses a bulk-driven comparator and a PMOS blocking technique and allows for a reliable short to battery breakdown voltage without using a series blocking diode. Integration of these blocks into a standard CMOS process leads to cost savings as additional devices such as data converters and microprocessors are combined with the Hall-effect sensor interface.
Author: Hussein Ballan Publisher: Springer Science & Business Media ISBN: 079238234X Category : Technology & Engineering Languages : en Pages : 302
Book Description
Standard voltages used in today's ICs may vary from about 1.3V to more than 100V, depending on the technology and the application. High voltage is therefore a relative notion. High Voltage Devices and Circuits in Standard CMOS Technologies is mainly focused on standard CMOS technologies, where high voltage (HV) is defined as any voltage higher than the nominal (low) voltage, i.e. 5V, 3.3V, or even lower. In this standard CMOS environment, IC designers are more and more frequently confronted with HV problems, particularly at the I/O level of the circuit. In the first group of applications, a large range of industrial or consumer circuits either require HV driving capabilities, or are supposed to work in a high-voltage environment. This includes ultrasonic drivers, flat panel displays, robotics, automotive, etc. On the other hand, in the emerging field of integrated microsystems, MEMS actuators mainly make use of electrostatic forces involving voltages in the typical range of 30 to 60V. Last but not least, with the advent of deep sub-micron and/or low-power technologies, the operating voltage tends towards levels ranging from 1V to 2.5V, while the interface needs to be compatible with higher voltages, such as 5V. For all these categories of applications, it is usually preferable to perform most of the signal processing at low voltage, while the resulting output rises to a higher voltage level. Solving this problem requires some special actions at three levels: technology, circuit design and layout. High Voltage Devices and Circuits in Standard CMOS Technologies addresses these topics in a clear and organized way. The theoretical background is supported by practical information and design examples. It is an invaluable reference for researchers and professionals in both the design and device communities.
Author: Johan Huijsing Publisher: Springer Science & Business Media ISBN: 1402028059 Category : Technology & Engineering Languages : en Pages : 406
Book Description
Analog Circuit Design contains the contribution of 18 experts from the 13th International Workshop on Advances in Analog Circuit Design. It is number 13 in the successful series of Analog Circuit Design. It provides 18 excellent overviews of analog circuit design in: Sensor and Actuator Interfaces, Integrated High-Voltage Electronics and Power Management, and Low-Power and High-Resolution ADC’s. Analog Circuit Design is an essential reference source for analog circuits designers and researchers wishing to keep abreast with the latest developments in the field. The tutorial coverage also makes it suitable for use in an advanced design course.
Author: Arjuna Marzuki Publisher: CRC Press ISBN: 1000071510 Category : Technology & Engineering Languages : en Pages : 311
Book Description
The purpose of this book is to provide a complete working knowledge of the Complementary Metal-Oxide Semiconductor (CMOS) analog and mixed-signal circuit design, which can be applied for System on Chip (SOC) or Application-Specific Standard Product (ASSP) development. It begins with an introduction to the CMOS analog and mixed-signal circuit design with further coverage of basic devices, such as the Metal-Oxide Semiconductor Field-Effect Transistor (MOSFET) with both long- and short-channel operations, photo devices, fitting ratio, etc. Seven chapters focus on the CMOS analog and mixed-signal circuit design of amplifiers, low power amplifiers, voltage regulator-reference, data converters, dynamic analog circuits, color and image sensors, and peripheral (oscillators and Input/Output [I/O]) circuits, and Integrated Circuit (IC) layout and packaging. Features: Provides practical knowledge of CMOS analog and mixed-signal circuit design Includes recent research in CMOS color and image sensor technology Discusses sub-blocks of typical analog and mixed-signal IC products Illustrates several design examples of analog circuits together with layout Describes integrating based CMOS color circuit
Author: Francisco Serra-Graells Publisher: Springer Science & Business Media ISBN: 0306487217 Category : Technology & Engineering Languages : en Pages : 209
Book Description
Low-Voltage CMOS Log Companding Analog Design presents in detail state-of-the-art analog circuit techniques for the very low-voltage and low-power design of systems-on-chip in CMOS technologies. The proposed strategy is mainly based on two bases: the Instantaneous Log Companding Theory, and the MOSFET operating in the subthreshold region. The former allows inner compression of the voltage dynamic-range for very low-voltage operation, while the latter is compatible with CMOS technologies and suitable for low-power circuits. The required background on the specific modeling of the MOS transistor for Companding is supplied at the beginning. Following this general approach, a complete set of CMOS basic building blocks is proposed and analyzed for a wide variety of analog signal processing. In particular, the covered areas include: amplification and AGC, arbitrary filtering, PTAT generation, and pulse duration modulation (PDM). For each topic, several case studies are considered to illustrate the design methodology. Also, integrated examples in 1.2um and 0.35um CMOS technologies are reported to verify the good agreement between design equations and experimental data. The resulting analog circuit topologies exhibit very low-voltage (i.e. 1V) and low-power (few tenths of uA) capabilities. Apart from these specific design examples, a real industrial application in the field of hearing aids is also presented as the main demonstrator of all the proposed basic building blocks. This system-on-chip exhibits true 1V operation, high flexibility through digital programmability and very low-power consumption (about 300uA including the Class-D amplifier). As a result, the reported ASIC can meet the specifications of a complete family of common hearing aid models. In conclusion, this book is addressed to both industry ASIC designers who can apply its contents to the synthesis of very low-power systems-on-chip in standard CMOS technologies, as well as to the teachers of modern circuit design in electronic engineering.
Author: Hussein Ballan Publisher: Springer Science & Business Media ISBN: 1475754043 Category : Technology & Engineering Languages : en Pages : 294
Book Description
Standard voltages used in today's ICs may vary from about 1.3V to more than 100V, depending on the technology and the application. High voltage is therefore a relative notion. High Voltage Devices and Circuits in Standard CMOS Technologies is mainly focused on standard CMOS technologies, where high voltage (HV) is defined as any voltage higher than the nominal (low) voltage, i.e. 5V, 3.3V, or even lower. In this standard CMOS environment, IC designers are more and more frequently confronted with HV problems, particularly at the I/O level of the circuit. In the first group of applications, a large range of industrial or consumer circuits either require HV driving capabilities, or are supposed to work in a high-voltage environment. This includes ultrasonic drivers, flat panel displays, robotics, automotive, etc. On the other hand, in the emerging field of integrated microsystems, MEMS actuators mainly make use of electrostatic forces involving voltages in the typical range of 30 to 60V. Last but not least, with the advent of deep sub-micron and/or low-power technologies, the operating voltage tends towards levels ranging from 1V to 2.5V, while the interface needs to be compatible with higher voltages, such as 5V. For all these categories of applications, it is usually preferable to perform most of the signal processing at low voltage, while the resulting output rises to a higher voltage level. Solving this problem requires some special actions at three levels: technology, circuit design and layout. High Voltage Devices and Circuits in Standard CMOS Technologies addresses these topics in a clear and organized way. The theoretical background is supported by practical information and design examples. It is an invaluable reference for researchers and professionals in both the design and device communities.
Author: Amir Zjajo Publisher: Springer Science & Business Media ISBN: 9048197252 Category : Technology & Engineering Languages : en Pages : 311
Book Description
With the fast advancement of CMOS fabrication technology, more and more signal-processing functions are implemented in the digital domain for a lower cost, lower power consumption, higher yield, and higher re-configurability. This has recently generated a great demand for low-power, low-voltage A/D converters that can be realized in a mainstream deep-submicron CMOS technology. However, the discrepancies between lithography wavelengths and circuit feature sizes are increasing. Lower power supply voltages significantly reduce noise margins and increase variations in process, device and design parameters. Consequently, it is steadily more difficult to control the fabrication process precisely enough to maintain uniformity. The inherent randomness of materials used in fabrication at nanoscopic scales means that performance will be increasingly variable, not only from die-to-die but also within each individual die. Parametric variability will be compounded by degradation in nanoscale integrated circuits resulting in instability of parameters over time, eventually leading to the development of faults. Process variation cannot be solved by improving manufacturing tolerances; variability must be reduced by new device technology or managed by design in order for scaling to continue. Similarly, within-die performance variation also imposes new challenges for test methods. In an attempt to address these issues, Low-Power High-Resolution Analog-to-Digital Converters specifically focus on: i) improving the power efficiency for the high-speed, and low spurious spectral A/D conversion performance by exploring the potential of low-voltage analog design and calibration techniques, respectively, and ii) development of circuit techniques and algorithms to enhance testing and debugging potential to detect errors dynamically, to isolate and confine faults, and to recover errors continuously. The feasibility of the described methods has been verified by measurements from the silicon prototypes fabricated in standard 180nm, 90nm and 65nm CMOS technology.
Author: Tertulien Ndjountche Publisher: CRC Press ISBN: 0429850409 Category : Technology & Engineering Languages : en Pages : 1176
Book Description
High-speed, power-efficient analog integrated circuits can be used as standalone devices or to interface modern digital signal processors and micro-controllers in various applications, including multimedia, communication, instrumentation, and control systems. New architectures and low device geometry of complementary metaloxidesemiconductor (CMOS) technologies have accelerated the movement toward system on a chip design, which merges analog circuits with digital, and radio-frequency components.
Author: Johan Huijsing Publisher: Springer Science & Business Media ISBN: 1475722338 Category : Computers Languages : en Pages : 447
Book Description
Many interesting design trends are shown by the six papers on operational amplifiers (Op Amps). Firstly. there is the line of stand-alone Op Amps using a bipolar IC technology which combines high-frequency and high voltage. This line is represented in papers by Bill Gross and Derek Bowers. Bill Gross shows an improved high-frequency compensation technique of a high quality three stage Op Amp. Derek Bowers improves the gain and frequency behaviour of the stages of a two-stage Op Amp. Both papers also present trends in current-mode feedback Op Amps. Low-voltage bipolar Op Amp design is presented by leroen Fonderie. He shows how multipath nested Miller compensation can be applied to turn rail-to-rail input and output stages into high quality low-voltage Op Amps. Two papers on CMOS Op Amps by Michael Steyaert and Klaas Bult show how high speed and high gain VLSI building blocks can be realised. Without departing from a single-stage OT A structure with a folded cascode output, a thorough high frequency design technique and a gain-boosting technique contributed to the high-speed and the high-gain achieved with these Op Amps. . Finally. Rinaldo Castello shows us how to provide output power with CMOS buffer amplifiers. The combination of class A and AB stages in a multipath nested Miller structure provides the required linearity and bandwidth.
Author: Riley D. Beck
Author: Riley D. Beck
Author: Hussein Ballan
Author: Johan Huijsing
Author: Arjuna Marzuki
Author: Francisco Serra-Graells
Author: Hussein Ballan
Author: Amir Zjajo
Author: Tertulien Ndjountche
Author: Johan Huijsing
Author: Franco Maloberti