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Author: Pallavi Srivastava Publisher: Springer Nature ISBN: 3031183975 Category : Technology & Engineering Languages : en Pages : 129
Book Description
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
Author: Pallavi Srivastava Publisher: Springer Nature ISBN: 3031183975 Category : Technology & Engineering Languages : en Pages : 129
Book Description
This book is intended for designers with experience in traditional (clocked) circuit design, seeking information about asynchronous circuit design, in order to determine if it would be advantageous to adopt asynchronous methodologies in their next design project. The author introduces a generic approach for implementing a deterministic completion detection scheme for asynchronous bundled data circuits that incorporates a data-dependent computational process, taking advantage of the average-case delay. The author validates the architecture using a barrel shifter, as shifting is the basic operation required by all the processors. The generic architecture proposed in this book for a deterministic completion detection scheme for bundled data circuits will facilitate researchers in considering the asynchronous design style for developing digital circuits.
Author: Sylvain Clerc Publisher: Springer Nature ISBN: 3030394964 Category : Technology & Engineering Languages : en Pages : 433
Book Description
This book discusses the advantages and challenges of Body-Biasing for integrated circuits and systems, together with the deployment of the design infrastructure needed to generate this Body-Bias voltage. These new design solutions enable state of the art energy efficiency and system flexibility for the latest applications, such as Internet of Things and 5G communications.
Author: Vishnu Unnikrishnan Publisher: Linköping University Electronic Press ISBN: 9176856240 Category : Languages : en Pages : 52
Book Description
Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moore's law. Digital circuits benefit from technology scaling to become faster, more energy efficient as well as more area efficient as the feature size is scaled down. Moreover, digital design also benefits from mature CAD tools that simplify the design and cross-technology porting of complex systems, leveraging on a cell-based design methodology. On the other hand, the design of analog circuits is getting increasingly difficult as the feature size scales down into the deep nanometer regime due to a variety of reasons like shrinking voltage headroom, reducing intrinsic gain of the devices, increasing noise coupling between circuit nodes due to shorter distances etc. Furthermore, analog circuits are still largely designed with a full custom design ow that makes their design and porting tedious, slow, and expensive. In this context, it is attractive to consider realizing analog/mixed-signal circuits using standard digital components. This leads to scaling-friendly mixed-signal blocks that can be designed and ported using the existing CAD framework available for digital design. The concept is already being applied to mixed-signal components like frequency synthesizers where all-digital architectures are synthesized using standard cells as basic components. This can be extended to other mixed-signal blocks like digital-to-analog and analog to- digital converters as well, where the latter is of particular interest in this thesis. A voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is an attractive architecture to achieve all-digital analog-to digital conversion due to favorable properties like shaping of the quantization error, inherent anti-alias filtering etc. Here a VCO operates as a signal integrator as well as a quantizer. A converter employing a ring oscillator as the VCO lends itself to an all-digital implementation. In this dissertation, we explore the design of VCO-based ADCs synthesized using digital standard cells with the long-term goal of achieving high performance data converters built from low accuracy switch components. In a first step, an ADC is designed using vendor supplied standard cells and fabricated in a 65 nm CMOS process. The converter delivers an 8-bit ENOB over a 25 MHz bandwidth while consuming 3.3 mW of power resulting in an energy efficiency of 235 fJ/step (Walden FoM). Then we utilize standard digital CAD tools to synthesize converter designs that are fully described using a hardware description language. A polynomial-based digital post-processing scheme is proposed to correct for the VCO nonlinearity. In addition, pulse modulation schemes like delta modulation and asynchronous sigma-delta modulation are used as a signal pre-coding scheme, in an attempt to reduce the impact of VCO nonlinearity on converter performance. In order to investigate the scaling benefits of all-digital data conversion, a VCO-based converter is designed in a 28 nm CMOS process. The design delivers a 13.4-bit ENOB over a 5 MHz bandwidth achieving an energy efficiency of 4.3 fJ/step according to post-synthesis schematic simulation, indicating that such converters have the potential of achieving good performance in deeply scaled processes by exploiting scaling benefits. Furthermore, large conversion errors caused by non-ideal sampling of the oscillator phase are studied. An encoding scheme employing ones counters is proposed to code the sampled ring oscillator output into a number, which is resilient to a class of sampling induced errors modeled by temporal reordering of the transitions in the ring. The proposed encoding reduces the largest error caused by random reordering of up to six subsequent bits in the sampled signal from 31 to 2 LSBs. Finally, the impact of process, voltage, and temperature (PVT) variations on the performance while operating the converter from a subthreshold supply is investigated. PVT-adaptive solutions are suggested as a means to achieve energy-efficient operation over a wide range of PVT conditions.
Author: Snehashish Chakraverty Publisher: John Wiley & Sons ISBN: 1119423449 Category : Mathematics Languages : en Pages : 254
Book Description
Examines numerical and semi-analytical methods for differential equations that can be used for solving practical ODEs and PDEs This student-friendly book deals with various approaches for solving differential equations numerically or semi-analytically depending on the type of equations and offers simple example problems to help readers along. Featuring both traditional and recent methods, Advanced Numerical and Semi Analytical Methods for Differential Equations begins with a review of basic numerical methods. It then looks at Laplace, Fourier, and weighted residual methods for solving differential equations. A new challenging method of Boundary Characteristics Orthogonal Polynomials (BCOPs) is introduced next. The book then discusses Finite Difference Method (FDM), Finite Element Method (FEM), Finite Volume Method (FVM), and Boundary Element Method (BEM). Following that, analytical/semi analytic methods like Akbari Ganji's Method (AGM) and Exp-function are used to solve nonlinear differential equations. Nonlinear differential equations using semi-analytical methods are also addressed, namely Adomian Decomposition Method (ADM), Homotopy Perturbation Method (HPM), Variational Iteration Method (VIM), and Homotopy Analysis Method (HAM). Other topics covered include: emerging areas of research related to the solution of differential equations based on differential quadrature and wavelet approach; combined and hybrid methods for solving differential equations; as well as an overview of fractal differential equations. Further, uncertainty in term of intervals and fuzzy numbers have also been included, along with the interval finite element method. This book: Discusses various methods for solving linear and nonlinear ODEs and PDEs Covers basic numerical techniques for solving differential equations along with various discretization methods Investigates nonlinear differential equations using semi-analytical methods Examines differential equations in an uncertain environment Includes a new scenario in which uncertainty (in term of intervals and fuzzy numbers) has been included in differential equations Contains solved example problems, as well as some unsolved problems for self-validation of the topics covered Advanced Numerical and Semi Analytical Methods for Differential Equations is an excellent text for graduate as well as post graduate students and researchers studying various methods for solving differential equations, numerically and semi-analytically.
Author: Boris Murmann Publisher: Springer Nature ISBN: 3030183386 Category : Science Languages : en Pages : 597
Book Description
In this book, a global team of experts from academia, research institutes and industry presents their vision on how new nano-chip architectures will enable the performance and energy efficiency needed for AI-driven advancements in autonomous mobility, healthcare, and man-machine cooperation. Recent reviews of the status quo, as presented in CHIPS 2020 (Springer), have prompted the need for an urgent reassessment of opportunities in nanoelectronic information technology. As such, this book explores the foundations of a new era in nanoelectronics that will drive progress in intelligent chip systems for energy-efficient information technology, on-chip deep learning for data analytics, and quantum computing. Given its scope, this book provides a timely compendium that hopes to inspire and shape the future of nanoelectronics in the decades to come.
Author: Itamar Levi Publisher: Springer ISBN: 9783030407858 Category : Technology & Engineering Languages : en Pages : 185
Book Description
This book presents Dual Mode Logic (DML), a new design paradigm for digital integrated circuits. DML logic gates can operate in two modes, each optimized for a different metric. Its on-the-fly switching between these operational modes at the gate, block and system levels provide maximal E-D optimization flexibility. Each highly detailed chapter has multiple illustrations showing how the DML paradigm seamlessly implements digital circuits that dissipate less energy while simultaneously improving performance and reducing area without a significant compromise in reliability. All the facets of the DML methodology are covered, starting from basic concepts, through single gate optimization, general module optimization, design trade-offs and new ways DML can be integrated into standard design flows using standard EDA tools. DML logic is compatible with numerous applications but is particularly advantageous for ultra-low power, reliable high performance systems, and advanced scaled technologies Written in language accessible to students and design engineers, each topic is oriented toward immediate application by all those interested in an alternative to CMOS logic. Describes a novel, promising alternative to conventional CMOS logic, known as Dual Mode Logic (DML), with which a single gate can be operated selectively in two modes, each optimized for a different metric (e.g., energy consumption, performance, size); Demonstrates several techniques at the architectural level, which can result in high energy savings and improved system performance; Focuses on the tradeoffs between power, area and speed including optimizations at the transistor and gate level, including alternatives to DML basic cells; Illustrates DML efficiency for a variety of VLSI applications.
Author: Pallavi Srivastava
Author: Pallavi Srivastava
Author: ETCMOS
Author: Y. Omura
Author: Sylvain Clerc
Author: Vishnu Unnikrishnan
Author: Nabil Shovon Ashraf
Author: Snehashish Chakraverty
Author: Boris Murmann
Author: Itamar Levi
Author: