Author: Charles James BurnettPublisher:
ISBN:
Category : Fault-tolerant computing
Languages : en
Pages : 246
Book Description
Fault Simulation of Combinational Circuits Based on Critical Path Tracing
Author: Charles James BurnettPublisher:
ISBN:
Category : Fault-tolerant computing
Languages : en
Pages : 246
Book Description
On Fault Simulation of Digital Circuits by Critical Path Tracking
Author: C. ChenFast Fault Simulation and Compact Test Generation
Author: T. RamakrishnanTesting of Digital Systems
Author: N. K. JhaPublisher: Cambridge University Press
ISBN: 9781139437431
Category : Computers
Languages : en
Pages : 1022
Book Description
Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.
Fault Simulation by Improved Critical Path Tracing
Author: Anindya SenPublisher:
ISBN:
Category : Critical path analysis
Languages : en
Pages : 274
Book Description
Masters Theses in the Pure and Applied Sciences
Author: Wade H. ShaferPublisher: Springer Science & Business Media
ISBN: 1461524539
Category : Science
Languages : en
Pages : 391
Book Description
Masters Theses in the Pure and Applied Sciences was first conceived, published, and disseminated by the Center for Information and Numerical Data Analysis and Synthesis (CINDAS)* at Purdue University in 1957, starting its coverage of theses with the academic year 1955. Beginning with Volume 13, the printing and dis semination phases of the activity were transferred to University Microfilms/Xerox of Ann Arbor, Michigan, with the though that such an arrangement would be more beneficial to the academic and general scientific and technical community. After five years of this joint undertaking we had concluded that it was in the interest of all concerned if the printing and distribution of the volumes were handled by an international publishing house to assure improved service and broader dissemi nation. Hence, starting with Volume 18, Masters Theses in the Pure and Applied Sciences has been disseminated on a worldwide basis by Plenum Publishing Corporation of New York, and in the same year the coverage was broadened to include Canadian universities. All back issues can also be ordered from Plenum. We have reported in Volume 37 (thesis year 1992) a total of 12,549 thesis titles from 25 Canadian and 153 United States universities. We are sure that this broader base for these titles reported will greatly enhance the value of this impor tant annual reference work. While Volume 37 reports theses submitted in 1992, on occasion, certain uni versities do report theses submitted in previous years but not reported at the time.
Design and Test Technology for Dependable Systems-on-chip
Author: Raimund UbarPublisher: IGI Global
ISBN: 1609602145
Category : Computers
Languages : en
Pages : 550
Book Description
"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--
Comprehensive Fault Diagnosis of Combinational Circuits
Author: David B. LavoPublisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 278
Book Description
Digital System Test and Testable Design
Author: Zainalabedin NavabiPublisher: Springer Science & Business Media
ISBN: 1441975489
Category : Technology & Engineering
Languages : en
Pages : 452
Book Description
This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.
Digital Logic Testing and Simulation
Author: Alexander MiczoPublisher: John Wiley & Sons
ISBN: 0471457779
Category : Technology & Engineering
Languages : en
Pages : 697
Book Description
Your road map for meeting today's digital testing challenges Today, digital logic devices are common in products that impact public safety, including applications in transportation and human implants. Accurate testing has become more critical to reliability, safety, and the bottom line. Yet, as digital systems become more ubiquitous and complex, the challenge of testing them has become more difficult. As one development group designing a RISC stated, "the work required to . . . test a chip of this size approached the amount of effort required to design it." A valued reference for nearly two decades, Digital Logic Testing and Simulation has been significantly revised and updated for designers and test engineers who must meet this challenge. There is no single solution to the testing problem. Organized in an easy-to-follow, sequential format, this Second Edition familiarizes the reader with the many different strategies for testing and their applications, and assesses the strengths and weaknesses of the various approaches. The book reviews the building blocks of a successful testing strategy and guides the reader on choosing the best solution for a particular application. Digital Logic Testing and Simulation, Second Edition covers such key topics as: * Binary Decision Diagrams (BDDs) and cycle-based simulation * Tester architectures/Standard Test Interface Language (STIL) * Practical algorithms written in a Hardware Design Language (HDL) * Fault tolerance * Behavioral Automatic Test Pattern Generation (ATPG) * The development of the Test Design Expert (TDX), the many obstacles encountered and lessons learned in creating this novel testing approach Up-to-date and comprehensive, Digital Logic Testing and Simulation is an important resource for anyone charged with pinpointing faulty products and assuring quality, safety, and profitability.