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Author: Arash Daghighi Publisher: LAP Lambert Academic Publishing ISBN: 9783843389518 Category : Languages : en Pages : 132
Book Description
Analog circuit design based on partially-depleted (PD) Silicon-on-Insulator (SOI) MOSFET requires body-contacted devices in order to avoid floating body effects and the resulting body voltage mismatch. In this book, a simple and high performance diamond-shaped body contact (DSBC) for PD SOI devices is presented. Two and three-dimensional device simulation are used to demonstrate the performance functionality of the body contact. DSBC devices are designed using standard layers in 0.35 micron PD SOI MOSFET process. Experimental characterization of the fabricated DSBC structures confirms the efficiency of the new contact in floating body suppression and current drive capability. The new body contact structure is applicable to both low- and high-voltage SOI and bulk devices.
Author: Arash Daghighi Publisher: LAP Lambert Academic Publishing ISBN: 9783843389518 Category : Languages : en Pages : 132
Book Description
Analog circuit design based on partially-depleted (PD) Silicon-on-Insulator (SOI) MOSFET requires body-contacted devices in order to avoid floating body effects and the resulting body voltage mismatch. In this book, a simple and high performance diamond-shaped body contact (DSBC) for PD SOI devices is presented. Two and three-dimensional device simulation are used to demonstrate the performance functionality of the body contact. DSBC devices are designed using standard layers in 0.35 micron PD SOI MOSFET process. Experimental characterization of the fabricated DSBC structures confirms the efficiency of the new contact in floating body suppression and current drive capability. The new body contact structure is applicable to both low- and high-voltage SOI and bulk devices.
Author: Yasuhisa Omura Publisher: The Electrochemical Society ISBN: 1566777127 Category : Semiconductors Languages : en Pages : 357
Book Description
This issue of ECS Transactions contains papers on silicon-on-insulator subjects including devices, device physics, modelling, simulations, microelectronics, photonics, nano-technology, integrated circuits, radiation hardness, material characterization, reliability, and sensors
Author: J.-P. Colinge Publisher: Springer Science & Business Media ISBN: 9781402077739 Category : Science Languages : en Pages : 392
Book Description
Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, retraces the evolution of SOI materials, devices and circuits over a period of roughly twenty years. Twenty years of progress, research and development during which SOI material fabrication techniques have been born and abandoned, devices have been invented and forgotten, but, most importantly, twenty years during which SOI Technology has little by little proven it could outperform bulk silicon in every possible way. The turn of the century turned out to be a milestone for the semiconductor industry, as high-quality SOI wafers suddenly became available in large quantities. From then on, it took only a few years to witness the use of SOI technology in a wealth of applications ranging from audio amplifiers and wristwatches to 64-bit microprocessors. This book presents a complete and state-of-the-art review of SOI materials, devices and circuits. SOI fabrication and characterization techniques, SOI CMOS processing, and the physics of the SOI MOSFET receive an in-depth analysis. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition, also describes the properties of other SOI devices, such as multiple gate MOSFETs, dynamic threshold devices and power MOSFETs. The advantages and performance of SOI circuits used in both niche and mainstream applications are discussed in detail. The SOI specialist will find this book invaluable as a source of compiled references covering the different aspects of SOI technology. For the non-specialist, the book serves an excellent introduction to the topic with detailed, yet simple and clear explanations. Silicon-on-Insulator Technology: Materials to VLSI, Third Edition is recommended for use as a textbook for classes on semiconductor device processing and physics at the graduate level.
Author: Maria J. Anc Publisher: IET ISBN: 9780863413346 Category : Technology & Engineering Languages : en Pages : 164
Book Description
SIMOX represents the first effort to compile a broad spectrum of knowledge from various groups of researchers and technologists in the world. It provides the reader with a basic understanding of SIMOX technology and in addition gives a good starting point for further investigation and applications.
Author: Salvador Pinillos Gimenez Publisher: Morgan & Claypool Publishers ISBN: 1627054820 Category : Technology & Engineering Languages : en Pages : 83
Book Description
This book aims at describing in detail the different layout techniques for remarkably boosting the electrical performance and the ionizing radiation tolerance of planar Metal-Oxide-Semiconductor (MOS) Field Effect Transistors (MOSFETs) without adding any costs to the current planar Complementary MOS (CMOS) integrated circuits (ICs) manufacturing processes. These innovative layout styles are based on pn junctions engineering between the drain/source and channel regions or simply MOSFET gate layout change. These interesting layout structures are capable of incorporating new effects in the MOSFET structures, such as the Longitudinal Corner Effect (LCE), the Parallel connection of MOSFETs with Different Channel Lengths Effect (PAMDLE), the Deactivation of the Parallel MOSFETs in the Bird's Beak Regions (DEPAMBBRE), and the Drain Leakage Current Reduction Effect (DLECRE), which are still seldom explored by the semiconductor and CMOS ICs industries. Several three-dimensional (3D) numerical simulations and experimental works are referenced in this book to show how these layout techniques can help the designers to reach the analog and digital CMOS ICs specifications with no additional cost. Furthermore, the electrical performance and ionizing radiation robustness of the analog and digital CMOS ICs can significantly be increased by using this gate layout approach.
Author: Arash Daghighi
Author: Arash Daghighi
Author: Arash Daghighi
Author: Yasuhisa Omura
Author: 
Author: 
Author: J.-P. Colinge
Author: Maria J. Anc
Author: Institute of Electrical and Electronics Engineers
Author: Salvador Pinillos Gimenez
Author: