Author: David B. Lavo
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 140
Book Description
Diagnosing Realistic Bridging Faults with Single Stuck-at Information
Author: David B. Lavo
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 140
Book Description
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 140
Book Description
Data Mining and Diagnosing IC Fails
Author: Leendert M. Huisman
Publisher: Springer Science & Business Media
ISBN: 0387263519
Category : Technology & Engineering
Languages : en
Pages : 259
Book Description
This book grew out of an attempt to describe a variety of tools that were developed over a period of years in IBM to analyze Integrated Circuit fail data. The selection presented in this book focuses on those tools that have a significant statistical or datamining component. The danger of describing sta tistical analysis methods is the amount of non-trivial mathematics that is involved and that tends to obscure the usually straigthforward analysis ideas. This book is, therefore, divided into two roughly equal parts. The first part contains the description of the various analysis techniques and focuses on ideas and experimental results. The second part contains all the mathematical details that are necessary to prove the validity of the analysis techniques, the existence of solutions to the problems that those techniques engender, and the correctness of several properties that were assumed in the first part. Those who are interested only in using the analysis techniques themselves can skip the second part, but that part is important, if only to understand what is being done.
Publisher: Springer Science & Business Media
ISBN: 0387263519
Category : Technology & Engineering
Languages : en
Pages : 259
Book Description
This book grew out of an attempt to describe a variety of tools that were developed over a period of years in IBM to analyze Integrated Circuit fail data. The selection presented in this book focuses on those tools that have a significant statistical or datamining component. The danger of describing sta tistical analysis methods is the amount of non-trivial mathematics that is involved and that tends to obscure the usually straigthforward analysis ideas. This book is, therefore, divided into two roughly equal parts. The first part contains the description of the various analysis techniques and focuses on ideas and experimental results. The second part contains all the mathematical details that are necessary to prove the validity of the analysis techniques, the existence of solutions to the problems that those techniques engender, and the correctness of several properties that were assumed in the first part. Those who are interested only in using the analysis techniques themselves can skip the second part, but that part is important, if only to understand what is being done.
Models in Hardware Testing
Author: Hans-Joachim Wunderlich
Publisher: Springer Science & Business Media
ISBN: 9048132827
Category : Computers
Languages : en
Pages : 263
Book Description
Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.
Publisher: Springer Science & Business Media
ISBN: 9048132827
Category : Computers
Languages : en
Pages : 263
Book Description
Model based testing is the most powerful technique for testing hardware and software systems. Models in Hardware Testing describes the use of models at all the levels of hardware testing. The relevant fault models for nanoscaled CMOS technology are introduced, and their implications on fault simulation, automatic test pattern generation, fault diagnosis, memory testing and power aware testing are discussed. Models and the corresponding algorithms are considered with respect to the most recent state of the art, and they are put into a historical context by a concluding chapter on the use of physical fault models in fault tolerance.
SOC Design Methodologies
Author: Michel Robert
Publisher: Springer
ISBN: 0387355979
Category : Technology & Engineering
Languages : en
Pages : 489
Book Description
The 11 th IFIP International Conference on Very Large Scale Integration, in Montpellier, France, December 3-5,2001, was a great success. The main focus was about IP Cores, Circuits and System Designs & Applications as well as SOC Design Methods and CAD. This book contains the best papers (39 among 70) that have been presented during the conference. Those papers deal with all aspects of importance for the design of the current and future integrated systems. System on Chip (SOC) design is today a big challenge for designers, as a SOC may contain very different blocks, such as microcontrollers, DSPs, memories including embedded DRAM, analog, FPGA, RF front-ends for wireless communications and integrated sensors. The complete design of such chips, in very deep submicron technologies down to 0.13 mm, with several hundreds of millions of transistors, supplied at less than 1 Volt, is a very challenging task if design, verification, debug and industrial test are considered. The microelectronic revolution is fascinating; 55 years ago, in late 1947, the transistor was invented, and everybody knows that it was by William Shockley, John Bardeen and Walter H. Brattein, Bell Telephone Laboratories, which received the Nobel Prize in Physics in 1956. Probably, everybody thinks that it was recognized immediately as a major invention.
Publisher: Springer
ISBN: 0387355979
Category : Technology & Engineering
Languages : en
Pages : 489
Book Description
The 11 th IFIP International Conference on Very Large Scale Integration, in Montpellier, France, December 3-5,2001, was a great success. The main focus was about IP Cores, Circuits and System Designs & Applications as well as SOC Design Methods and CAD. This book contains the best papers (39 among 70) that have been presented during the conference. Those papers deal with all aspects of importance for the design of the current and future integrated systems. System on Chip (SOC) design is today a big challenge for designers, as a SOC may contain very different blocks, such as microcontrollers, DSPs, memories including embedded DRAM, analog, FPGA, RF front-ends for wireless communications and integrated sensors. The complete design of such chips, in very deep submicron technologies down to 0.13 mm, with several hundreds of millions of transistors, supplied at less than 1 Volt, is a very challenging task if design, verification, debug and industrial test are considered. The microelectronic revolution is fascinating; 55 years ago, in late 1947, the transistor was invented, and everybody knows that it was by William Shockley, John Bardeen and Walter H. Brattein, Bell Telephone Laboratories, which received the Nobel Prize in Physics in 1956. Probably, everybody thinks that it was recognized immediately as a major invention.
Detecting Bridging Faults with Stuck-at Test Sets
Author: Stanford University. Computer Systems Laboratory
Publisher:
ISBN:
Category :
Languages : en
Pages : 35
Book Description
Simulations run on sample circuits show that extremely high detection of bridging faults is possible using modifications of psuedo-exhaustive test sets. Real chips often contain bridging faults, and this research shows that stuck-at test sets are not sufficient for detecting such faults. The modified pseudo-exhaustive test sets are easy to generate and require little, or no, fault simulation. Criteria have been found for identifying bridging faults unlikely to be detected by test sets. Techniques for increasing the bridging fault coverage of test sets without consuming excessive computer time are suggested. Keywords: Bridging faults, stuck-at faults, pseudo-exhaustive test, fault modeling, fault tolerant computing.
Publisher:
ISBN:
Category :
Languages : en
Pages : 35
Book Description
Simulations run on sample circuits show that extremely high detection of bridging faults is possible using modifications of psuedo-exhaustive test sets. Real chips often contain bridging faults, and this research shows that stuck-at test sets are not sufficient for detecting such faults. The modified pseudo-exhaustive test sets are easy to generate and require little, or no, fault simulation. Criteria have been found for identifying bridging faults unlikely to be detected by test sets. Techniques for increasing the bridging fault coverage of test sets without consuming excessive computer time are suggested. Keywords: Bridging faults, stuck-at faults, pseudo-exhaustive test, fault modeling, fault tolerant computing.
Comprehensive Fault Diagnosis of Combinational Circuits
Author: David B. Lavo
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 278
Book Description
Publisher:
ISBN:
Category : Integrated circuits
Languages : en
Pages : 278
Book Description
Microelectronics Failure Analysis
Author:
Publisher: ASM International
ISBN: 0871708043
Category : Technology & Engineering
Languages : en
Pages : 813
Book Description
For newcomers cast into the waters to sink or swim as well as seasoned professionals who want authoritative guidance desk-side, this hefty volume updates the previous (1999) edition. It contains the work of expert contributors who rallied to the job in response to a committee's call for help (the committee was assigned to the update by the Electron
Publisher: ASM International
ISBN: 0871708043
Category : Technology & Engineering
Languages : en
Pages : 813
Book Description
For newcomers cast into the waters to sink or swim as well as seasoned professionals who want authoritative guidance desk-side, this hefty volume updates the previous (1999) edition. It contains the work of expert contributors who rallied to the job in response to a committee's call for help (the committee was assigned to the update by the Electron
A Designer’s Guide to Built-In Self-Test
Author: Charles E. Stroud
Publisher: Springer Science & Business Media
ISBN: 0306475049
Category : Technology & Engineering
Languages : en
Pages : 338
Book Description
A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
Publisher: Springer Science & Business Media
ISBN: 0306475049
Category : Technology & Engineering
Languages : en
Pages : 338
Book Description
A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
Microelectronic Failure Analysis
Author: Richard J. Ross
Publisher: ASM International(OH)
ISBN:
Category : Education
Languages : en
Pages : 664
Book Description
Forty-seven papers on electronics failure analysis provide an overview for newcomers to the field and a reference tool for the experienced analyst. Topics include electron/ion bean-based techniques, deprocessing and sample preparation, and physical/chemical defect characterization. For the fourth ed
Publisher: ASM International(OH)
ISBN:
Category : Education
Languages : en
Pages : 664
Book Description
Forty-seven papers on electronics failure analysis provide an overview for newcomers to the field and a reference tool for the experienced analyst. Topics include electron/ion bean-based techniques, deprocessing and sample preparation, and physical/chemical defect characterization. For the fourth ed