Author: Eum Chan WooPublisher:
ISBN:
Category : Metal oxide semiconductors, Complementary
Languages : en
Pages : 136
Book Description
Design Considerations for Wide Tuning Range Ring Oscillators in Nanometer CMOS Technologies
Author: Eum Chan WooPublisher:
ISBN:
Category : Metal oxide semiconductors, Complementary
Languages : en
Pages : 136
Book Description
Design of Low-voltage Wide Tuning Range CMOS Multipass Voltage-controlled Ring Oscillator
Author: Jie RenDesign and Performance Analysis of CMOS Ring Oscillator
Author: Sushil KumarPublisher: LAP Lambert Academic Publishing
ISBN: 9783659551574
Category :
Languages : en
Pages : 116
Book Description
In the tremendous growth of wireless handheld devices, low power consumption becomes a major consideration in radio frequency integrated circuit (RFIC) designs. This book introduces a multistage voltage controlled ring oscillator. The proposed structure uses 45 nm CMOS Technology in cadence. PSS analyses are performed in order to determine the frequency of oscillation and the influence of parameters such as supply voltage, temperature or load capacitance over the oscillation frequency. A transient analysis is performed to illustrate the effects of the parasitic parameters over the oscillation frequency. Ring oscillators with different number of stages like 7, 9 and 11 were designed successfully and their performance parameters are discussed in great detail and compared to reach to solutions to the challenges faced by the current Ring Oscillator technology. The challenges are phase noise, frequency jitter, period jitter, delay, jitter, total harmonic distortion (THD), transfer function etc. and are dealt appropriately in the system designs proposed for different number of stages. For example, a certain signal may have a phase noise of -80 dBc/Hz at an offset of 10 KHz.
Design of High-Performance CMOS Voltage-Controlled Oscillators
Author: Liang DaiPublisher: Springer Science & Business Media
ISBN: 1461511453
Category : Technology & Engineering
Languages : en
Pages : 170
Book Description
Design of High-Performance CMOS Voltage-Controlled Oscillators presents a phase noise modeling framework for CMOS ring oscillators. The analysis considers both linear and nonlinear operation. It indicates that fast rail-to-rail switching has to be achieved to minimize phase noise. Additionally, in conventional design the flicker noise in the bias circuit can potentially dominate the phase noise at low offset frequencies. Therefore, for narrow bandwidth PLLs, noise up conversion for the bias circuits should be minimized. We define the effective Q factor (Qeff) for ring oscillators and predict its increase for CMOS processes with smaller feature sizes. Our phase noise analysis is validated via simulation and measurement results. The digital switching noise coupled through the power supply and substrate is usually the dominant source of clock jitter. Improving the supply and substrate noise immunity of a PLL is a challenging job in hostile environments such as a microprocessor chip where millions of digital gates are present.
Transformer-Based Design Techniques for Oscillators and Frequency Dividers
Author: Howard Cam LuongPublisher: Springer
ISBN: 3319158740
Category : Technology & Engineering
Languages : en
Pages : 214
Book Description
This book provides in-depth coverage of transformer-based design techniques that enable CMOS oscillators and frequency dividers to achieve state-of-the-art performance. Design, optimization, and measured performance of oscillators and frequency dividers for different applications are discussed in detail, focusing on not only ultra-low supply voltage but also ultra-wide frequency tuning range and locking range. This book will be an invaluable reference for anyone working or interested in CMOS radio-frequency or mm-Wave integrated circuits and systems.
The Designer's Guide to Jitter in Ring Oscillators
Author: John A. McNeillPublisher: Springer Science & Business Media
ISBN: 038776528X
Category : Technology & Engineering
Languages : en
Pages : 292
Book Description
This guide emphasizes jitter for time domain applications so that there is not a need to translate from frequency domain. This provides a more direct path to the results for designing in an application area where performance is specified in the time domain. The book includes classification of oscillator types and an exhaustive guide to existing research literature. It also includes classification of measurement techniques to help designers understand how the eventual performance of circuit design is verified.
Instructor's Solution Manaul for Operation and Modeling of the Mo 3rd Ed
Author: Charles Batchelor Professor of Electrical Engineering Yannis TsividisPublisher:
ISBN: 9780199733774
Category : Metal oxide semiconductor field-effect transistors
Languages : en
Pages : 248
Book Description
A Clock Multiplier Based on an Injection Locked Ring Oscillator
Author: Nahla Tarek Youssef AbouelkheirPublisher:
ISBN:
Category :
Languages : en
Pages :
Book Description
Clock multipliers are among the most critical elements in high speed digital circuits. Power consumption, area, jitter and wide tuning range are key design metrics in these circuits. To provide a wide range of clock frequencies, Digitally Controlled Ring Oscillators (DCROs), whose frequencies are discretely tuned using a Frequency Code Word (FCW), have been investigated in recent studies. They have several advantages over LC-based Voltage Controlled Oscillators (VCO) including simplicity of design, small die area (i.e. no large inductors), better compatibility with deep submicron CMOS processes,ability to offer multiple output phases, and wider tuning range.A compact differential Injection Locked Clock Multiplier (ILCM) based on an injection locked DCRO is implemented in this thesis. As the transistor features continuously shrink and the supply voltage is reduced, ILCMs are becoming more prone to issues such as increased effect of random mismatch, increased device noise, susceptibility of the design to noise coupling and vulnerability to Process Voltage and Temperature (PVT) variations. Furthermore, ILCMs in recent System on a Chip (SoCs) have stringent design requirements including accurate frequency tuning, fine fractional resolution, high levels of integration and better amenability to technology scaling. In the proposed ILCM, multiple techniques were used to address deep submicron CMOS design challenges, as well as modern applications' requirements. The design is fully digital, synthesizable and automatically placed and routed. All circuit blocks were implemented using digital design flow and designed using a Hardware Description Language (HDL). This allows the design to be more easily ported to deep submicron processes. Online or offline PVT calibration can be performed using a replica oscillator and high speed digital counters to track frequency drifts with PVT variations. A DCRO based on a matrix structure has been utilized to reduce period variations due to random mismatch. The DCRO is built up from pseudo differential delay cells to enhance design immunity to noise coupling. The key thesis contributions are implementing a new DCRO structure using fully syntheziable differential structure, utilizing a novel PVT calibrator that can compensate for frequency mismatch between the main DCRO and its replica, and using a low complexity fractional ILCM technique that achieves a fine fractional resolution with few number of ring oscillator stages.Designed in a TSMC 65 nm GP CMOS process with no analog or RF enhancements, the proposed ILCM frequency ranges from 1.0 to 1.8 GHz and occupies 124:5 m 170 m of chip area. The ILCM can operate in integer or fractional mode for multiplication ratios up to 9. At 1.7 GHz and 1.1 V, the measured integrated RMS jitter (1 kHz to 30 MHz) for the 3rd and 9th multiplication factors are 197 fs and 381 fs, respectively. The ILCM consumes 13.25 mW of power and has a fraction resolution of fref=32. Furthermore, it achieves a jitter-power FOM of −241 dB, when measured at room temperature and 1.1 V. When tested in the presence of switching noise, it provides up to 7 dB improvement in phase noise when compared to a single ended version of the ILCM. In the presence of voltage variations (from 0.9 V to 1.1 V) and temperature variations (from 30 C to 70 C), the maximum integrated RMS jitter variation observed was 50 fs.
The Design of Low Noise Oscillators
Author: Ali HajimiriPublisher: Springer Science & Business Media
ISBN: 0792384555
Category : Technology & Engineering
Languages : en
Pages : 214
Book Description
It is hardly a revelation to note that wireless and mobile communications have grown tremendously during the last few years. This growth has placed stringent requi- ments on channel spacing and, by implication, on the phase noise of oscillators. C- pounding the challenge has been a recent drive toward implementations of transceivers in CMOS, whose inferior 1/f noise performance has usually been thought to disqualify it from use in all but the lowest-performance oscillators. Low noise oscillators are also highly desired in the digital world, of course. The c- tinued drive toward higher clock frequencies translates into a demand for ev- decreasing jitter. Clearly, there is a need for a deep understanding of the fundamental mechanisms g- erning the process by which device, substrate, and supply noise turn into jitter and phase noise. Existing models generally offer only qualitative insights, however, and it has not always been clear why they are not quantitatively correct.
Ultra-wide Tuning Range Signal Generation in CMOS for Millimeter Wave Rotational Spectroscopy
Author: Jing ZhangPublisher:
ISBN:
Category : Electromagnetic waves
Languages : en
Pages : 262
Book Description
Electromagnetic waves in the millimeter and submillimeter wave frequency range are being utilized in fast-scan rotational spectroscopy for detection and identification of gas molecules. This technique can be used for monitoring indoor air quality, gas leaks, human breath, and others for a wide variety of safety, security and medical applications. Advances of the high frequency capability of complementary metal-oxide semiconductor (CMOS) have made it an affordable means for implementing the electronics for these spectroscopy systems. A signal generation circuit operating at ~100 GHz and higher with an ultra-wide frequency tuning range (~50%) is a key component for the systems. This research focuses on developing key techniques for ultra-wide tuning millimeter wave signal generation in CMOS. First, the applicability of using NMOS switched variable inductors in millimeter wave frequencies for wide frequency tuning is demonstrated via design of an LC voltage-controlled oscillator (LC VCO) incorporating NMOS switched variable inductors and tunable output buffers. The prototype fabricated in a TI 65-nm bulk CMOS process demonstrated a wide frequency tuning of 21.5 to 33.4 GHz without a frequency tuning gap. The phase noise at 10-MHz offset of VCO varies from -117 to -109 dBc/Hz. The oscillator core consumes 4 or 6 mA from a 1.2-V power supply. These represent a record 43.3% tuning range with FOMT ranging from -191.7 to -181.9 dBc/Hz. With tunable output buffers, the measured signal output power is above -15 dBm across the entire frequency range. Second, a passive quadrature coupling and broadband harmonic combining network is demonstrated. This network has 3-dB lower theoretical fundamental-to-4th order harmonic conversion loss than that of the linear superposition technique, with no extra DC power consumption, lower phase noise, while bypassing the need for a broadband on-chip bias-tee. A quadrature LC VCO incorporating this novel passive coupling and broadband harmonic combining for frequency multiplication by 4 is fabricated to generate signals over a wide frequency range above 90 GHz. The prototype fabricated in TI 65-nm bulk CMOS demonstrated a continuous frequency tuning from 85 to 127 GHz. This ~40% frequency tuning range is at least 4X higher than the other CMOS implementations with center frequency over 90 GHz. At power consumption of 30~45 mW from a 1.5-V power supply, the measured output power varies from -15 to -23 dBm and phase noise at 10-MHz offset varies from -108 to -102 dBc/Hz over the output frequency range. These are sufficient for use in millimeter wave rotational spectroscopy. This work paves the way for implementing a single-chip CMOS transmitter for rotational spectroscopy at 180-300 GHz.