Author: Jihong ChoiPublisher:
ISBN:
Category :
Languages : en
Pages : 442
Book Description
Chip Scale Modeling of Chemical Mechanical Planarization (CMP) for Layout Dependent Variation
Author: Jihong ChoiAdvanced Modeling of Planarization Processes for Integrated Circuit Fabrication
Author: Wei Fan (Ph. D.)Publisher:
ISBN:
Category :
Languages : en
Pages : 225
Book Description
Planarization processes are a key enabling technology for continued performance and density improvements in integrated circuits (ICs). Dielectric material planarization is widely used in front-end-of-line (FEOL) processing for device isolation and in back-end-of-line (BEOL) processing for interconnection. This thesis studies the physical mechanisms and variations in the planarization using chemical mechanical polishing (CMP). The major achievement and contribution of this work is a systematic methodology to physically model and characterize the non-uniformities in the CMP process. To characterize polishing mechanisms at different length scales, physical CMP models are developed in three levels: wafer-level, die-level and particle-level. The wafer-level model investigates the CMP tool effects on wafer-level pressure non-uniformity. The die-level model is developed to study chip-scale non-uniformity induced by layout pattern density dependence and CMP pad properties. The particle-level model focuses on the contact mechanism between pad asperities and the wafer. Two model integration approaches are proposed to connect wafer-level and particle-level models to the die-level model, so that CMP system impacts on die-level uniformity and feature size dependence are considered. The models are applied to characterize and simulate CMP processes by fitting polishing experiment data and extracting physical model parameters. A series of physical measurement approaches are developed to characterize CMP pad properties and verify physical model assumptions. Pad asperity modulus and characteristic asperity height are measured by nanoindentation and microprofilometry, respectively. Pad aging effect is investigated by comparing physical measurement results at different pad usage stages. Results show that in-situ conditioning keeps pad surface properties consistent to perform polishing up to 16 hours, even in the face of substantial pad wear during extended polishing. The CMP mechanisms identified from modeling and physical characterization are applied to explore an alternative polishing process, referred to as pad-in-a-bottle (PIB). A critical challenge related to applied pressure using pad-in-a-bottle polishing is predicted.
Integrated Modeling of Chemical Mechanical Planarization/Polishing (CMP) for Integrated Circuit Fabrication
Author: Jianfeng LuoMicroelectronic Applications of Chemical Mechanical Planarization
Author: Yuzhuo LiPublisher: John Wiley & Sons
ISBN: 9780470180891
Category : Technology & Engineering
Languages : en
Pages : 760
Book Description
An authoritative, systematic, and comprehensive description of current CMP technology Chemical Mechanical Planarization (CMP) provides the greatest degree of planarization of any known technique. The current standard for integrated circuit (IC) planarization, CMP is playing an increasingly important role in other related applications such as microelectromechanical systems (MEMS) and computer hard drive manufacturing. This reference focuses on the chemical aspects of the technology and includes contributions from the foremost experts on specific applications. After a detailed overview of the fundamentals and basic science of CMP, Microelectronic Applications of Chemical Mechanical Planarization: * Provides in-depth coverage of a wide range of state-of-the-art technologies and applications * Presents information on new designs, capabilities, and emerging technologies, including topics like CMP with nanomaterials and 3D chips * Discusses different types of CMP tools, pads for IC CMP, modeling, and the applicability of tribometrology to various aspects of CMP * Covers nanotopography, CMP performance and defect profiles, CMP waste treatment, and the chemistry and colloidal properties of the slurries used in CMP * Provides a perspective on the opportunities and challenges of the next fifteen years Complete with case studies, this is a valuable, hands-on resource for professionals, including process engineers, equipment engineers, formulation chemists, IC manufacturers, and others. With systematic organization and questions at the end of each chapter to facilitate learning, it is an ideal introduction to CMP and an excellent text for students in advanced graduate courses that cover CMP or related semiconductor manufacturing processes.
Tribo-chemical Mechanisms of Copper Chemical Mechanical Planarization (CMP)
Author: Shantanu TripathiMulti-scale Models for Wafer Surface Evolution in Chemical Mechanical Planarization
Author: Xiaoping WangPublisher:
ISBN:
Category :
Languages : en
Pages : 140
Book Description
As device size decreases and circuit density increases, planarization technology becomes more and more important in semiconductor fabrication. Chemical mechanical planarization (CMP) has emerged as a new promising technique for its capability to achieve better local and global planarization of wafer surface. However, CMP process is sensitive to the pattern structure variation across a chip. The material removal rates are different for the regions with different pattern structure. Therefore, CMP obtains local planarization but generates global thickness variation. Two models, referred as Models I and II, are developed to investigate the pattern structure effect on the post-CMP wafer profile. Model I assumes that the pad asperities contact with the wafer directly. In developing this model, at first, the pressure distribution between a rough pad and a patterned wafer is evaluated based on Greenwood and Williamson model (1966); then, approaches are proposed to re-distribute the pressure due to pad bending to account for the effects of surrounding topography. The modified pressure is utilized in Archard's law (1953) to predict the local material removal rate and associated wafer surface evolution. This model has been verified against the experimental observations. A parametric study is conducted using this model to investigate the effects of pad roughness, bending ability, and influence length (which is defined the range of area over which the surrounding features affect the material removal rate at a given location). CMP designs for effective planarization are discussed based on Model I. Model II extends Model I to account for the abrasive particles effects. The wafer material removal is assumed to be primarily due to the slurry particles abrasion. Modeling is focused on a small region on the wafer surface. The contact pressure at this region is evaluated by Model I first. Then the material removed by a single active particle sliding over this region is estimated. After estimating the number of active particles sliding over this region during a time step, the total material removed from this region and the mean material removal rate can be calculated. By doing this across the whole wafer surface, the wafer profile evolution is obtained.
Advances in Chemical Mechanical Planarization (CMP)
Author: Babu SuryadevaraPublisher: Woodhead Publishing
ISBN: 0128218193
Category : Technology & Engineering
Languages : en
Pages : 650
Book Description
Advances in Chemical Mechanical Planarization (CMP), Second Edition provides the latest information on a mainstream process that is critical for high-volume, high-yield semiconductor manufacturing, and even more so as device dimensions continue to shrink. The second edition includes the recent advances of CMP and its emerging materials, methods, and applications, including coverage of post-CMP cleaning challenges and tribology of CMP. This important book offers a systematic review of fundamentals and advances in the area. Part one covers CMP of dielectric and metal films, with chapters focusing on the use of current and emerging techniques and processes and on CMP of various materials, including ultra low-k materials and high-mobility channel materials, and ending with a chapter reviewing the environmental impacts of CMP processes. New content addressed includes CMP challenges with tungsten, cobalt, and ruthenium as interconnect and barrier films, consumables for ultralow topography and CMP for memory devices. Part two addresses consumables and process control for improved CMP and includes chapters on CMP pads, diamond disc pad conditioning, the use of FTIR spectroscopy for characterization of surface processes and approaches for defection characterization, mitigation, and reduction. Advances in Chemical Mechanical Planarization (CMP), Second Edition is an invaluable resource and key reference for materials scientists and engineers in academia and R&D. Reviews the most relevant techniques and processes for CMP of dielectric and metal films Includes chapters devoted to CMP for current and emerging materials Addresses consumables and process control for improved CMP, including post-CMP
Design for Manufacturability and Yield for Nano-Scale CMOS
Author: Charles ChiangPublisher: Springer Science & Business Media
ISBN: 1402051883
Category : Technology & Engineering
Languages : en
Pages : 277
Book Description
This book walks the reader through all the aspects of manufacturability and yield in a nano-CMOS process. It covers all CAD/CAE aspects of a SOC design flow and addresses a new topic (DFM/DFY) critical at 90 nm and beyond. This book is a must read book the serious practicing IC designer and an excellent primer for any graduate student intent on having a career in IC design or in EDA tool development.
Yield Improvement of Chemical Mechanical Planarization Processes
Author: Sutee EamkajornsiriPublisher:
ISBN:
Category :
Languages : en
Pages : 298
Book Description
Chemical mechanical polishing (CMP) is a planarization process that produces high quality surfaces both locally and globally. It is one of the key process steps during fabrication of very large scale integrated (VLSI) chips in integrated circuit (IC) manufacturing. High and reliable wafer yield is critical in the CMP process; it is dependent upon uniformity of material removal rate across the entire wafer. The focus on this research is the development of control algorithm for CMP process. Wafer-scale and die-scale models are the two scales used in this study. To achieve improvement in wafer yield, three control strategies are formulated with greedy algorithm, method heuristic and non-linear programming in this wafer-scale. The simulation results show that average wafer yield from genetic algorithm is improved, compared to greedy algorithm. Moreover, average wafer yield from non-linear programming is also improved, compared to greedy algorithm. At die-scale, a comprehensive control algorithm is developed based on the MRR equations with interface pressure as a control parameter. The interface pressure is varied spatially and/or temporally across the die. In this concept, three control strategies are developed and studied. The strategies are included spatial pressure control, spatial and temporal pressure control, and look-ahead scheduled pressure control. The simulation results of these three strategies show improvement in the upper surface uniformity; however, look-ahead scheduled pressure control seems to be the promising algorithm.
Handbook of Semiconductor Manufacturing Technology
Author: Yoshio NishiPublisher: CRC Press
ISBN: 9780824787837
Category : Technology & Engineering
Languages : en
Pages : 1186
Book Description
The Handbook of Semiconductor Manufacturing Technology describes the individual processes and manufacturing control, support, and infrastructure technologies of silicon-based integrated-circuit manufacturing, many of which are also applicable for building devices on other semiconductor substrates. Discussing ion implantation, rapid thermal processing, photomask fabrication, chip testing, and plasma etching, the editors explore current and anticipated equipment, devices, materials, and practices of silicon-based manufacturing. The book includes a foreword by Jack S. Kilby, cowinner of the Nobel Prize in Physics 2000 "for his part in the invention of the integrated circuit."