Author: Joseph Sifakis Publisher: Springer Science & Business Media ISBN: 9783540521488 Category : Computers Languages : en Pages : 392
Book Description
This volume contains the proceedings of a workshop held in Grenoble in June 1989. This was the first workshop entirely devoted to the verification of finite state systems. The workshop brought together researchers and practitioners interested in the development and use of methods, tools and theories for automatic verification of finite state systems. The goal at the workshop was to compare verification methods and tools to assist the applications designer. The papers in this volume review verification techniques for finite state systems and evaluate their relative advantages. The techniques considered cover various specification formalisms such as process algebras, automata and logics. Most of the papers focus on exploitation of existing results in three application areas: hardware design, communication protocols and real-time systems.
Author: Vladislavs Jahundovics Publisher: Linköping University Electronic Press ISBN: 9176859185 Category : Languages : en Pages : 155
Book Description
This thesis presents a completely automatic verification framework to check safety properties of parameterized systems. A parameterized system is a family of finite state systems where every system consists of a finite number of processes running in parallel the same algorithm. All the systems in the family differ only in the number of the processes and, in general, the number of systems in a family may be unbounded. Examples of parameterized systems are communication protocols, mutual exclusion protocols, cache coherence protocols, distributed algorithms etc. Model-checking of finite state systems is a well-developed formal verification approach of proving properties of systems in an automatic way. However, it cannot be applied directly to parameterized systems because the unbounded number of systems in a family means an infinite state space. In this thesis we propose to abstract an original family of systems consisting of an unbounded number of processes into one consisting of a fixed number of processes. An abstracted system is considered to consist of k+1 components—k reference processes and their environment. The transition relation for the abstracted system is an over-approximation of the transition relation for the original system, therefore, a set of reachable states of the abstracted system is an over-approximation of the set of reachable states of the original one. A safety property is considered to be parameterized by a fixed number of processes whose relationship is in the center of attention in the property. Such processes serve as reference processes in the abstraction. We propose an encoding which allows to perform reachability analysis for an abstraction parameterized by the reference processes. We have successfully verified three classic parameterized systems with replicated processes by applying this method.
Author: Rajeev Alur Publisher: ISBN: Category : Formal languages Languages : en Pages : 356
Book Description
In the proposed verification method, a finite state system is modeled as a composition of time automata, and the correctness is specified either as a deterministic timed automaton, or as a formula of MITL or TCTL. In each case we develop an algorithm for model checking. The distinguishing feature of our work is the use of the set of reals to model time; we argue that the denseness of the time domain is crucial for modeling event-driven asynchronous systems. The thesis also clarifies the relationship between different models and logics for real-time, and answers some basic questions regarding complexity, decidability, and expressiveness."
Author: Olaf Burkart Publisher: Springer ISBN: 3540696784 Category : Computers Languages : en Pages : 169
Book Description
A common approach in software engineering is to apply during the design phase a variety of structured techniques like top-down design, decomposition and abstraction, while only subsequently, in the implementation phase, is the design tested to ensure reliability. But this approach neglects that central aspects of software design and program development have a strong formal character which admits tool support for the construction of reliable and correct computer systems based on formal reasoning. This monograph provides much information both for theoreticians interested in algebraic theories, and for software engineers building practically relevant tools. The author presents the theoretical foundations needed for the verification of reactive, sequential infinite-state systems.
Author: Rajeev Alur Publisher: Springer ISBN: 9783540614746 Category : Computers Languages : en Pages : 496
Book Description
This book constitutes the refereed proceedings of the 8th International Conference on Computer Aided Verification, CAV '96, held in New Brunswick, NJ, USA, in July/August 1996 as part of the FLoC '96 federated conference. The volume presents 32 revised full research contributions selected from a total of 93 submissions; also included are 20 carefully selected descriptions of tools and case studies. The set of papers reports the state-of-the-art of the theory and practice of computer assisted formal analysis methods for software and hardware systems; a certain emphasis is placed on verification tools and the algorithms and techniques that are needed for their implementation.
Author: Robert Kurshan Publisher: Springer Science & Business Media ISBN: 1461535565 Category : Technology & Engineering Languages : en Pages : 143
Book Description
Computer-Aided Verification is a collection of papers that begins with a general survey of hardware verification methods. Ms. Gupta starts with the issue of verification itself and develops a taxonomy of verification methodologies, focusing especially upon recent advances. Although her emphasis is hardware verification, most of what she reports applies to software verification as well. Graphical presentation is coming to be a de facto requirement for a `friendly' user interface. The second paper presents a generic format for graphical presentations of coordinating systems represented by automata. The last two papers as a pair, present a variety of generic techniques for reducing the computational cost of computer-aided verification based upon explicit computational memory: the first of the two gives a time-space trade-off, while the second gives a technique which trades space for a (sometimes predictable) probability of error. Computer-Aided Verification is an edited volume of original research. This research work has also been published as a special issue of the journal Formal Methods in System Design, 1:2-3.
Author: Joseph Sifakis
Author: Joseph Sifakis
Author: Vladislavs Jahundovics
Author: Michael C. Browne
Author: Rajeev Alur
Author: Olaf Burkart
Author: Rajeev Alur
Author: Robert Kurshan
Author: Michael C. Browne
Author: Ernest Hemingway