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Author: Wei Wang Publisher: ISBN: Category : University of Ottawa theses Languages : en Pages :
Book Description
In this thesis we present pvFPGA, the first system design solution for virtualizing an FPGA - based hardware accelerator on the x86 platform. The accelerator design on the FPGA can be used for accelerating various applications, regardless of the application computation latencies. Our design adopts the Xen virtual machine monitor (VMM) to build a paravirtualized environment, and a Xilinx Virtex - 6 as an FPGA accelerator. The accelerator communicates with the x86 server via PCI Express (PCIe). In comparison to the current GPU virtualization solutions, which primarily intercept and redirect API calls to the hosted or privileged domain's user space, pvFPGA virtualizes an FPGA accelerator directly at the lower device driver layer. This gives rise to higher efficiency and lower overhead. In pvFPGA, each unprivileged domain allocates a shared data pool for both user - kernel and inter-domain data transfer. In addition, we propose the coprovisor, a new component that enables multiple domains to simultaneously access an FPGA accelerator. The experimental results have shown that 1) pvFPGA achieves close-to-zero overhead compared to accessing the FPGA accelerator without the VMM layer, 2) the FPGA accelerator is successfully shared by multiple domains, 3) distributing different maximum data transfer bandwidths to different domains can be achieved by regulating the size of the shared data pool at the split driver loading time, 4) request turnaround time is improved through DMA (Direct Memory Access) context switches implemented by the coprovisor.
Author: Wei Wang Publisher: ISBN: Category : University of Ottawa theses Languages : en Pages :
Book Description
In this thesis we present pvFPGA, the first system design solution for virtualizing an FPGA - based hardware accelerator on the x86 platform. The accelerator design on the FPGA can be used for accelerating various applications, regardless of the application computation latencies. Our design adopts the Xen virtual machine monitor (VMM) to build a paravirtualized environment, and a Xilinx Virtex - 6 as an FPGA accelerator. The accelerator communicates with the x86 server via PCI Express (PCIe). In comparison to the current GPU virtualization solutions, which primarily intercept and redirect API calls to the hosted or privileged domain's user space, pvFPGA virtualizes an FPGA accelerator directly at the lower device driver layer. This gives rise to higher efficiency and lower overhead. In pvFPGA, each unprivileged domain allocates a shared data pool for both user - kernel and inter-domain data transfer. In addition, we propose the coprovisor, a new component that enables multiple domains to simultaneously access an FPGA accelerator. The experimental results have shown that 1) pvFPGA achieves close-to-zero overhead compared to accessing the FPGA accelerator without the VMM layer, 2) the FPGA accelerator is successfully shared by multiple domains, 3) distributing different maximum data transfer bandwidths to different domains can be achieved by regulating the size of the shared data pool at the split driver loading time, 4) request turnaround time is improved through DMA (Direct Memory Access) context switches implemented by the coprovisor.
Author: Iouliia Skliarova Publisher: Springer ISBN: 3030207218 Category : Technology & Engineering Languages : en Pages : 245
Book Description
This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
Author: Haoxing Ren Publisher: Springer Nature ISBN: 303113074X Category : Technology & Engineering Languages : en Pages : 585
Book Description
This book serves as a single-source reference to key machine learning (ML) applications and methods in digital and analog design and verification. Experts from academia and industry cover a wide range of the latest research on ML applications in electronic design automation (EDA), including analysis and optimization of digital design, analysis and optimization of analog design, as well as functional verification, FPGA and system level designs, design for manufacturing (DFM), and design space exploration. The authors also cover key ML methods such as classical ML, deep learning models such as convolutional neural networks (CNNs), graph neural networks (GNNs), generative adversarial networks (GANs) and optimization methods such as reinforcement learning (RL) and Bayesian optimization (BO). All of these topics are valuable to chip designers and EDA developers and researchers working in digital and analog designs and verification.
Author: Qianbin Chen Publisher: Springer ISBN: 3319666258 Category : Computers Languages : en Pages : 516
Book Description
The two-volume set LNICST 209-210 constitutes the post-conference proceedings of the 11th EAI International Conference on Communications and Networking, ChinaCom 2016, held in Chongqing, China, in September 2016. The total of 107 contributions presented in these volumes are carefully reviewed and selected from 181 submissions. The book is organized in topical sections on MAC schemes, traffic algorithms and routing algorithms, security, coding schemes, relay systems, optical systems and networks, signal detection and estimation, energy harvesting systems, resource allocation schemes, network architecture and SDM, heterogeneous networks, IoT (Internet of Things), hardware design and implementation, mobility management, SDN and clouds, navigation, tracking and localization, future mobile networks.
Author: Vanderlei Bonato Publisher: Springer ISBN: 331930481X Category : Computers Languages : en Pages : 374
Book Description
This book constitutes the refereed proceedings of the 12th International Symposium on Applied Reconfigurable Computing, ARC 2016, held in Rio de Janeiro, Brazil, in March 2016. The 20 full papers presented in this volume were carefully reviewed and selected from 47 submissions. They are organized in topical headings named: video and image processing; fault-tolerant systems; tools and architectures; signal processing; and multicore systems. In addition, the book contains 3 invited papers and 8 poster papers on funded RD running and completed projects.
Author: David Chisnall Publisher: Pearson Education ISBN: 013234971X Category : Computers Languages : en Pages : 320
Book Description
"The Xen hypervisor has become an incredibly strategic resource for the industry, as the focal point of innovation in cross-platform virtualization technology. David's book will play a key role in helping the Xen community and ecosystem to grow." -Simon Crosby, CTO, XenSource An Under-the-Hood Guide to the Power of Xen Hypervisor Internals The Definitive Guide to the Xen Hypervisor is a comprehensive handbook on the inner workings of XenSource's powerful open source paravirtualization solution. From architecture to kernel internals, author David Chisnall exposes key code components and shows you how the technology works, providing the essential information you need to fully harness and exploit the Xen hypervisor to develop cost-effective, highperformance Linux and Windows virtual environments. Granted exclusive access to the XenSource team, Chisnall lays down a solid framework with overviews of virtualization and the design philosophy behind the Xen hypervisor. Next, Chisnall takes you on an in-depth exploration of the hypervisor's architecture, interfaces, device support, management tools, and internals including key information for developers who want to optimize applications for virtual environments. He reveals the power and pitfalls of Xen in real-world examples and includes hands-on exercises, so you gain valuable experience as you learn. This insightful resource gives you a detailed picture of how all the pieces of the Xen hypervisor fit and work together, setting you on the path to building and implementing a streamlined, cost-efficient virtual enterprise. Coverage includes Understanding the Xen virtual architecture Using shared info pages, grant tables, and the memory management subsystem Interpreting Xen's abstract device interfaces Configuring and managing device support, including event channels, monitoring with XenStore, supporting core devices, and adding new device types Navigating the inner workings of the Xen API and userspace tools Coordinating virtual machines with the Scheduler Interface and API, and adding a new scheduler Securing near-native speed on guest machines using HVM Planning for future needs, including porting, power management, new devices, and unusual architectures
Author: Wei Wang
Author: Wei Wang
Author: Iouliia Skliarova
Author: Haoxing Ren
Author: Qianbin Chen
Author: Vanderlei Bonato
Author: Zhangxi Tan
Author: Dhaval N. Vyas
Author: Alexander John Petre Kane
Author: Siva Aneesh Gadela
Author: David Chisnall