Author: Jayanth ThyamagundlamPublisher:
ISBN:
Category :
Languages : en
Pages : 154
Book Description
A Comparative Study of Asynchronous and Synchronous IC Design Techniques
Author: Jayanth ThyamagundlamPublisher:
ISBN:
Category :
Languages : en
Pages : 154
Book Description
Masters Theses in the Pure and Applied Sciences
Author: Wade H. ShaferPublisher: Springer Science & Business Media
ISBN: 1461528321
Category : Science
Languages : en
Pages : 350
Book Description
Masters Theses in the Pure and Applied Sciences was first conceived, published, and disseminated by the Center for Information and Numerical Data Analysis and Synthesis (CINDAS) * at Purdue University in 1 957, starting its coverage of theses with the academic year 1955. Beginning with Volume 13, the printing and dissemination phases of the activity were transferred to University Microfilms/Xerox of Ann Arbor, Michigan, with the thought that such an arrangement would be more beneficial to the academic and general scientific and technical community. After five years of this joint undertaking we had concluded that it was in the interest of all con cerned if the printing and distribution of the volumes were handled by an interna tional publishing house to assure improved service and broader dissemination. Hence, starting with Volume 18, Masters Theses in the Pure and Applied Sciences has been disseminated on a worldwide basis by Plenum Publishing Cor poration of New York, and in the same year the coverage was broadened to include Canadian universities. All back issues can also be ordered from Plenum. We have reported in Volume 36 (thesis year 1991) a total of 11,024 thesis titles from 23 Canadian and 161 United States universities. We are sure that this broader base for these titles reported will greatly enhance the value of this important annual reference work. While Volume 36 reports theses submitted in 1991, on occasion, certain univer sities do report theses submitted in previous years but not reported at the time.
A comparative analysis of an asynchronous and a synchronous multiplier-accumulator design
Author: Kara Basden PepeMasters Theses in the Pure and Applied Sciences
Author: W. H. ShaferPublisher: Springer Science & Business Media
ISBN: 9780306444951
Category : Education
Languages : en
Pages : 368
Book Description
Volume 36 reports (for thesis year 1991) a total of 11,024 thesis titles from 23 Canadian and 161 US universities. The organization of the volume, as in past years, consists of thesis titles arranged by discipline, and by university within each discipline. The titles are contributed by any and all a
Asynchronous Digital Circuit Design
Author: Graham BirtwistlePublisher: Springer Science & Business Media
ISBN: 144713575X
Category : Mathematics
Languages : en
Pages : 272
Book Description
As the costs of power and timing become increasingly difficult to manage in traditional synchronous systems, designers are being forced to look at asynchronous alternatives. Based on reworked and expanded papers from the VII Banff Higher Order Workshop, this volume examines asynchronous methods which have been used in large circuit design, ranging from initial formal specification to more standard finite state machine based control models. Written by leading practitioners in the area, the papers cover many aspects of current practice including practical design, silicon compilation, and applications of formal specification. It also includes a state-of-the-art survey of asynchronous hardware design. The resulting volume will be invaluable to anyone interested in designing correct asynchronous circuits which exhibit high performance or low power operation.
Design and Performance Analysis of an Asynchronous Pipelined Multiplier with Comparison to Synchronous Implementation
Author: Kirk A. ShawhanPublisher:
ISBN: 9781423532576
Category :
Languages : en
Pages : 91
Book Description
Synchronous techniques have dominated digital logic system design for decades because they are well understood and less complicated to implement. With the advent of more exotic high-speed transistors, the issues of clock skew, system performance, power consumption, and technology migration become critical to synchronous system designers. Asynchronous digital design techniques utilize a local completion signal or request(acknowledge handshake to lend the stability afforded by the global clock in synchronous systems. This research evaluates a moderately complex digital system, an 8x8-bit multiplier utilizing high speed Indium Phosphide heterostructure bipolar junction transistors, to determine whether asynchronous logic design can compete with synchronous design in terms of system speed and power consumption. Theoretical timing equations are developed that relate the relative merits of each technique for input-to- output latency and system throughput. Tanner SPICE simulation tools are used to evaluate the full 8x8-bit asynchronous array multiplier. Finally, direct comparisons are made between five separate pipelined configurations of the multiplier utilizing both synchronous and asynchronous timing methodologies. As integrated circuits become smaller, faster, and more complex, asynchronous schemes will continue to mature and become more prevalent in digital system design.
Designing Asynchronous Circuits using NULL Convention Logic (NCL)
Author: Scott SmithPublisher: Springer Nature
ISBN: 3031798007
Category : Technology & Engineering
Languages : en
Pages : 86
Book Description
Designing Asynchronous Circuits using NULL Convention Logic (NCL) begins with an introduction to asynchronous (clockless) logic in general, and then focuses on delay-insensitive asynchronous logic design using the NCL paradigm. The book details design of input-complete and observable dual-rail and quad-rail combinational circuits, and then discusses implementation of sequential circuits, which require datapath feedback. Next, throughput optimization techniques are presented, including pipelining, embedding registration, early completion, and NULL cycle reduction. Subsequently, low-power design techniques, such as wavefront steering and Multi-Threshold CMOS (MTCMOS) for NCL, are discussed. The book culminates with a comprehensive design example of an optimized Greatest Common Divisor circuit. Readers should have prior knowledge of basic logic design concepts, such as Boolean algebra and Karnaugh maps. After studying this book, readers should have a good understanding of the differences between asynchronous and synchronous circuits, and should be able to design arbitrary NCL circuits, optimized for area, throughput, and power. Table of Contents: Introduction to Asynchronous Logic / Overview of NULL Convention Logic (NCL) / Combinational NCL Circuit Design / Sequential NCL Circuit Design / NCL Throughput Optimization / Low-Power NCL Design / Comprehensive NCL Design Example
Asynchronous 3D (Async3D)
Author: Francis Corpuz Sabado IIPublisher:
ISBN:
Category : Three-dimensional integrated circuits
Languages : en
Pages : 178
Book Description
This dissertation focuses on the application of 3D integrated circuit (IC) technology on asynchronous logic paradigms, mainly NULL Convention Logic (NCL) and Multi-Threshold NCL (MTNCL). It presents the Async3D tool flow and library for NCL and MTNCL 3D ICs. It also analyzes NCL and MTNCL circuits in 3D IC. Several FIR filter designs were implement in NCL, MTNCL, and synchronous architecture to compare synchronous and asynchronous circuits in 2D and 3D ICs. The designs were normalized based on performance and several metrics were measured for comparison. Area, interconnect length, power consumption, and power density were compared among NCL, MTNCL, and synchronous designs. The NCL and MTNCL designs showed improvements in all metrics when moving from 2D to 3D. The 3D NCL and MTNCL designs also showed a balanced power distribution in post-layout analysis. This could alleviate the hotspot problem prevalently found in most 3D ICs. NCL and MTNCL have the potential to synergize well with 3D IC technology.
FD-SOI Technology Opportunities for More Energy Efficient Asynchronous Circuits
Author: Thiago Ferreira de paiva leitePublisher:
ISBN:
Category :
Languages : en
Pages : 0
Book Description
Keeping the fast evolving pace of embedded systems of portable devices require ameliorations of power management techniques, without compromising the circuit performance and robustness. In this context, this thesis studies novel energy management schemes, and how to implement them, by using two main design approaches: asynchronous logic and adaptive body biasing (ABB) techniques. Four main contributions have been done, thus enabling the design of more energy efficient asynchronous circuits. 1) We contributed with the design of a Quasi-delay Insensitive (QDI) asynchronous ALU architecture, used in a comparative analysis of asynchronous versus synchronous systems. This first study has demonstrated the energy efficiency and robustness of QDI circuits, especially if operating at low power supply (Vdd ). 2) We proposed a new body built-in cell for implementing ABB schemes by tuning the circuit threshold voltage (Vth) on-the-fly; and detecting short-duration and long-duration transient faults (TF) caused by environmental radiation. The proposed cell is a key building block to fully benefit from body biasing features of the FD-SOI technology while enhancing system's reliability. 3) We assessed three different ABB strategies - based on automatic activity detection and multiple body-biasing domains (BBDs) - for QDI asynchronous circuits. Furthermore, a methodology for analyzing energy efficiency of ABB strategies in QDI asynchronous circuits is also proposed in this work. 4) We developed a standard cell-based IC design flow to apply ABB strategies with multiple BBDs by using the proposed body built-in cells. A testchip has been designed and fabricated to validate the developed design flow and the efficacy of the body built-in cell.
Introduction to Asynchronous Circuit Design
Author: Jens SparsøPublisher:
ISBN:
Category :
Languages : en
Pages : 270
Book Description
This book is an introduction to the design of asynchronous circuits. It is an updated and significantly extended version of an eight-chapter tutorial that first appeared as Part I in the book "Principles of asynchronous circuit design -- A systems perspective" edited by Sparsø and Furber (2001); a book that has become a standard reference on the topic. The extensions include improved coverage of data-flow components, a new chapter on two-phase bundled-data circuits, a new chapter on metastability, arbitration, and synchronization, and a new chapter on performance analysis using timed Petri nets. With these extensions, the text now provides a more complete coverage of the topic, and it is now made available as a stand-alone book. The book is a beginner's text and the amount of formal notation is deliberately kept at a minimum, using instead plain English and graphical illustrations to explain the underlying intuition and reasoning behind the concepts and methods covered. The book targets senior undergraduate and graduate students in Electrical and Computer Engineering and industrial designers with a background in conventional (clocked) digital design who wish to gain an understanding of asynchronous circuit design.